4421-DKDB2 Silicon Laboratories Inc, 4421-DKDB2 Datasheet - Page 18

KIT DEV TEST EZRADIO SI4421 TRX

4421-DKDB2

Manufacturer Part Number
4421-DKDB2
Description
KIT DEV TEST EZRADIO SI4421 TRX
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of 4421-DKDB2

Accessory Type
Test Card, Transceiver, 434MHz
Wireless Frequency
434 MHz
Interface Type
SPI
Modulation
FSK
For Use With/related Products
EZRadio®
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Bits 9-8 (d1 to d0):
VDI Logic Diagram:
Slow mode: The VDI signal will go high only if the DRSSI, DQD and the CR_LOCK (Clock Recovery Locked) signals present at the same
time. It stays high until any of the abovementioned signals present; it will go low when all the three input signals are low.
Medium mode: The VDI signal will be active when the CR_LOCK signal and either the DRSSI or the DQD signal is high. The valid data
indicator will go low when either the CR_LOCK gets inactive or both of the DRSSI or DQD signals go low.
Fast mode: The VDI signal follows the level of the DQD signal.
Always mode: VDI is connected to logic high permanently. It stays always high independently of the receiving parameters.
Bits 7-5 (i2 to i0):
Note: For the optimal bandwidth settings at different data rates see the table on page 37.
CR_LOCK
CR_LOCK
DRSSI
DRSSI
DQD
DQD
VDI (valid data indicator) signal response time setting:
Receiver baseband bandwidth (BW) select:
d1
0
0
1
1
i2
0
0
0
0
1
1
1
1
d0
SET
CLR
0
1
0
1
DQD
i1
0
0
1
1
0
0
1
1
R/S FF
i0
Q
0
1
0
1
0
1
0
1
Note:
* For details see the Power Management Command
Response
Always on
Medium
BW [kHz]
Slow
Reserved
Reserved
Fast
400
340
270
200
134
67
LOGIC HIGH
MEDIUM
SLOW
FAST
d0
d1
er *
SEL1
SEL0
IN0
IN1
IN2
IN3
MUX
CLR
Y
VDI
Si4421
18

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