STA-6033 Sirenza Microdevices Inc, STA-6033 Datasheet - Page 7

• Manufacturer Part Number: STA-6033
• Description: IC AMP HBT 5.9GHZ 3.3V 16-QFN
• Manufacturer: Sirenza Microdevices Inc

Specifications of STA-6033

• Current - Supply: 130mA ~ 190mA
• Frequency: 4.9GHz ~ 5.9GHz
• Gain: 22.5dB ~ 28.5dB
• Noise Figure: 5.7dB
• P1db: 24dBm ~ 25.5dBm
• Package / Case: 16-QFN
• Rf Type: 802.11a/Wi-Fi, 802.16/WiMax, ISM, WLAN
• Test Frequency: 5.875GHz
• Voltage - Supply: 3.3V
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

DS100622
10, 11
9, 12,
EPAD
1, 4,
2, 3
Pin
13
14
15
16
5
6
7
8
Recommended Land Pattern (dimensions in mm[in].):
0.75 [0.030]
1.58 [0.062]
VC1,Vbias
Function
RFOUT
VPC1
VPC2
VPC3
RFIN
Vdet
N/C
VC3
VC2
Gnd
(8PL)
0.005 CHAMFER
Pins are not used. May be grounded, left open, or connected to adjacent pin.
VPC1 is the bias control pin for the stage 1 active bias circuit. An external series resistor is required for proper setting of
bias levels. Refer to the evaluation board schematic for resistor value.To prevent potential damage, do not apply voltage
to this pin that is +1V greater than voltage applied to pin 16 (Vbias) unless Vpc supply current capability is less than
10mA.
VPC2 is the bias control pin for the stage 2 active bias circuit. An external series resistor is required for proper setting of
bias levels. Refer to the evaluation board schematic for resistor value.To prevent potential damage, do not apply voltage
to this pin that is +1V greater than voltage applied to pin 16 (Vbias) unless Vpc supply current capability is less than
10mA.
VPC3 is the control pin for the stage 3 active bias circuits. An external series resistor is required for proper setting of bias
levels. Refer to the evaluation board schematic for resistor value.To prevent potential damage, do not apply voltage to
this pin that is +1 V greater than voltage applied to pin 16 (Vbias) unless Vpc supply current capability is less than 10mA.
Output power detector voltage. Load with 10K to 100K to ground for best performance.
RF input pins. This is DC grounded internal to the IC. Do not apply voltage to this pin. All three pins must be used for
proper operation.
RF output pin. This is also another connection to the 3rd stage collector
3rd stage collector bias pin. Apply 3.0V to 3.6V to this pin.
2nd stage collector bias pin. Apply 3.0V to 3.6V to this pin.
1st stage collector bias pin and active bias network VCC. Apply 3.0V to 3.6V to this pin.
Exposed area on the bottom side of the package needs to be soldered to the ground plane of the board for optimum ther-
mal and RF performance. Several vias should be located under the EPAD as shown in the recommended land pattern).
Description
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at ([phone] or [e-mail].
Land Pattern and PCB Soldermask
0.50 [0.020]
1.58 [0.062]
0.26 [0.010]
Plated Thru (4PL)
Ø0.38 [Ø0.015]
0.38 [0.015]
0.29 [0.011]
0.21 [0.008]
Recommended PCB Soldermask (SMOBC)
for Land Pattern(dimensions in mm[in]):
3.17 [0.125]
0.50 [0.020]
STA-6033(Z)
1.20 [0.047]
0.53 [0.021]
0.25 [0.010]
0.46 [0.018]
1.20 [0.047]
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