SI4702-C19-GM Silicon Laboratories Inc, SI4702-C19-GM Datasheet
SI4702-C19-GM
Specifications of SI4702-C19-GM
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SI4702-C19-GM Summary of contents
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... USB FM radio MP3 players PDAs Portable radios Notebook PCs Description The Si4702/03 integrates the complete tuner function from antenna input to stereo audio output for FM broadcast radio reception. Functional Block Diagram Headphone Cable FMIP LNA PGA RFGND AGC ...
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... Si4702/03-C19 2 Rev. 1.1 ...
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... Pin Descriptions: Si4702/03-C19 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 8. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 9. Package Markings (Top Marks 9.1. Si4702 Top Mark . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 9.2. Si4703 Top Mark . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 9.3. Top Mark Explanation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 10. Package Outline: Si4702/03-C19 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 11. PCB Land Pattern: Si4702/03-C19 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Additional Reference Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43 Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .44 Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46 Si4702/03-C19 Rev. 1.1 Page ...
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... Exposure beyond recommended operating conditions for extended periods may affect device reliability. 2. The Si4702/03-C19 device is a high-performance RF integrated circuit with an ESD rating of < HBM. Handling and assembly of this device should only be done at ESD-protected workstations. ...
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... Low Level Output Voltage Notes: 1. All specifications for the Si4702 unless otherwise noted. 2. Refer to Register 02h, "Power Configuration" on page 24 for ENABLE bit description. 3. The LNA is automatically switched to higher current mode for optimum sensitivity in low SNR conditions. 4. Analog and digital supply currents are simultaneously adjusted based on SNR level. ...
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... Si4702/03-C19 Table 4. Reset Timing Characteristics (Busmode Select Method 1) Parameter RSTpulse width and GPIO3 Setup to RST SEN and SDIO Setup to RST SEN, SDIO, and GPIO3 Hold from RST Notes: 1. When selecting 2-wire Mode, the user must ensure that a 2-wire start condition (falling edge of SDIO while SCLK is high) does not occur within 300 ns before the rising edge of RST ...
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... RST GPIO3 GPIO1 Figure 2. Reset Timing Parameters for Busmode Select Method 2 (GPIO3 = 1) Symbol Test Condition Min t GPIO3 = 1 SRST2 t HRST2 t t SRST2 HRST2 70% 30% 70% 30% 70% 30% Rev. 1.1 Si4702/03-C19 1,2,3 Typ Max Unit 30 — — — — ...
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... Si4702/03-C19 Table 6. 3-Wire Control Interface Characteristics ( 2 1 Parameter SCLK Frequency SCLK High Time SCLK Low Time SDIO Input, SEN to SCLKSetup SDIO Input to SCLKHold Hold SEN Input to SCLK SEN Input to SCLKHold SCLKto SDIO Output Valid SCLK ...
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... SCLK 30 70% SEN 30% 80% SDIO A7 20% Address In Figure 4. 3-Wire Control Interface Read Timing Parameters t t HSDIO CDV t S A6-A5, R/W, A0 D15 A4-A1 ½ Cycle Bus Turnaround Rev. 1.1 Si4702/03-C19 t HSEN1 t CDZ t HSEN2 D14-D1 D0 Data Out 9 ...
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... When selecting 2-wire mode, the user must ensure that a 2-wire start condition (falling edge of SDIO while SCLK is high) does not occur within 300 ns before the rising edge of RST 2-wire transmitter, the Si4702/03-C19 delays SDIO by a minimum of 300 ns from the V comply with the specification ...
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... Figure 5. 2-Wire Control Interface Read and Write Timing Parameters SCLK A6-A0, SDIO R/W START ADDRESS + R/W Figure 6. 2-Wire Control Interface Read and Write Timing Diagram HIGH t r:IN f: HD:DAT SU:DAT D7-D0 ACK DATA ACK Rev. 1.1 Si4702/03-C19 t t SU:STO BUF t f:IN, STOP START t f:OUT D7-D0 DATA ACK STOP 11 ...
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... Si4702/03-C19 Table 8. FM Receiver Characteristics ( 2 1 Parameter Input Frequency 3,4,5,6,7 Sensitivity Sensitivity (50 matching 3,4,5,6,8 network) 8 RDS Sensitivity 8,9 LNA Input Resistance 8,9 LNA Input Capacitance 8,10 Input IP3 3,4,5,8,9 AM Suppression Adjacent Channel Selectivity Alternate Channel Selectivity 8 Spurious Response Rejection ...
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... C Single-ended L SPACE[1:0] = 0x, RCLK tolerance = 200 ppm From powerdown (Write ENABLE bit to 1) Input levels of 8 and 60 dBµ input . AGC is disabled by setting AGCD = 1. Refer to "6. Register Descriptions" on page 23. Rev. 1.1 Si4702/03-C19 Min Typ Max Unit — 34 — dBµVEMF 55 60 — dB — ...
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... Pin 2 connects to the antenna interface, refer to “AN231: Si4700/01/02/03 Headphone and Antenna Interface.” 6. Place Si4702/03-C19 as close as possible to antenna jack and keep the FMIP trace as short as possible. 7. Refer to Si4702/03 Internal Crystal Oscillator Errata. 8. Refer to "AN299: External 32.768 kHz Crystal Oscillator." ...
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... XTAL RSSI OSC by leading cell-phone world-wide. Laboratories The Si4702/03-C19 is based on the superior, proven performance of Silicon Laboratories' Aero architecture offering unmatched interference rejection and leading sensitivity. The device uses the same programming interface as the bus-modes. Power management is also simplified with an integrated regulator allowing direct connection to a designs ...
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... Left + Right error 0 Figure 8. MPX Signal Spectrum The Si4702/03-C19's automatically decodes the MPX signal. The kHz (L+R) signal is the mono output of the FM tuner. Stereo is generated from the (L+R), (L-R), and a 19 kHz pilot tone. The pilot tone is used as a reference to recover the (L-R) signal ...
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... The soft mute attenuation level can be adjusted with the SMUTEA[1:0] bits where 00 is the most attenuated. The soft mute disable (DSMUTE) bit may be set high to disable this feature. 4.6. Tuning The Si4702/03-C19 uses Silicon Laboratories’ patented and proven frequency synthesizer technology including a completely integrated VCO ...
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... SDIO activity results from polling the tuner for status or communicating with other devices that share the SDIO bus. If there is SDIO bus activity while the Si4702/03-C19 is performing the seek/tune function, the crystal oscillator may experience jitter, which may result in mistunes and/or false stops. ...
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... Read and Write Timing Diagram,” on page 11. Si4702/03-C19 4.9. Reset, Powerup, and Powerdown Driving the RST pin low will disable the Si4702/03-C19 and its control bus interface, and reset the registers to their default settings. Driving the RST pin high will bring the device out of reset ...
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... When proper voltages are Si4702/03-C19, the ENABLE and DISABLE bits in Register 02h can be used to select between powerup and powerdown modes. When voltage is first applied to the device, ENABLE = 0 and DISABLE = 0. Setting ENABLE = 1 and DISABLE = 0 puts the device in powerup mode. To power down the device, disable RDS to prevent any unpredictable behavior (Si4703 only), then write ENABLE and DISABLE bits to 1 ...
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... Set the ENABLE bit high and the DISABLE bit low to powerup the device. VA,VD Supply VIO Supply RST Pin RCLK Pin ENABLE Bit Figure 9. Initialization Sequence 4.12. Programming Guide Refer to "AN230: Si4700/01 Programming Guide" for control interface programming information. is not Rev. 1.1 Si4702/03-C19 21 ...
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... Si4702/03-C19 22 Rev. 1.1 ...
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... Register 01h. Chip ID Bit D15 D14 D13 D12 D11 Name REV[5:0] Type R Si4702C19 Reset value = 0x1053 if ENABLE = 1 Si4702C19 Reset value = 0x1000 if ENABLE = 0 Si4703C19 Reset value = 0x1253 if ENABLE = 1 Si4703C19 Reset value = 0x1200 if ENABLE = 0 Bit Name 15:10 REV[5:0] Chip Version. 0x04 = Rev C 9:6 DEV[3:0] Device ...
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... Si4702/03-C19 Register 02h. Power Configuration Bit D15 D14 D13 D12 D11 Name DSMUTE DMUTE MONO 0 Type R/W R/W R/W R/W Reset value = 0x0000 Bit Name 15 DSMUTE Softmute Disable Softmute enable (default Softmute disable. 14 DMUTE Mute Disable Mute enable (default Mute disable. ...
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... Freq (MHz) = Spacing (MHz) x Channel + 76 MHz. CHAN[9:0] is not updated during a seek operation. READCHAN[9:0] provides the current tuned channel and is updated during a seek operation and after a seek or tune operation completes. Channel spacing is set with the bits SPACE 05h[5:4]. Function D11 D10 Function Rev. 1.1 Si4702/03-C19 CHANNEL[9:0] R/W 25 ...
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... Si4702/03-C19 Register 04h. System Configuration 1 Bit D15 D14 D13 D12 Name RDSIEN STCIEN 0 RDS Type R/W R/W R/W R/W Reset value = 0x0000 Bit Name 15 RDSIEN RDS Interrupt Enable Disable Interrupt (default Enable Interrupt. Setting RDSIEN = 1 and GPIO2[1: will generate low pulse on GPIO2 when the RDSR 0Ah[15] bit is set ...
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... High. Setting STCIEN = 1 will generate low pulse on GPIO2 when the STC 0Ah[14] bit is set. Setting RDSIEN = 1 will generate low pulse on GPIO2 when the RDSR 0Ah[15] bit is set. 1:0 GPIO1[1:0] General Purpose I High impedance (default Reserved Low High. Si4702/03-C19 Function Rev. 1.1 27 ...
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... RSSI. SEEKTH presents the logarithmic RSSI threshold for the seek operation. The Si4702/03-C19 will not validate channels with RSSI below the SEEKTH value. SEEKTH is one of multiple parameters that can be used to validate channels. For more information, see "AN284: Si4700/01 Firmware 15 Seek Adjustability and Set- tings." ...
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... Required channel SNR for a valid seek channel. 3:0 SKCNT[3:0] Seek FM Impulse Detection Threshold. 0000 = disabled (default). 0001 = max (most stops). 1111 = min (fewest stops). Allowable number of FM impulses for a valid seek channel. D11 D10 VOLEXT R/W R/W R/W R/W Function Rev. 1.1 Si4702/03-C19 SKSNR[3:0] SKCNT[3:0] R/W R/W 29 ...
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... Application Schematic" on page 14. The oscillator must be enabled before powerup (ENABLE = 1) as shown in Figure 9, “Initialization Sequence,” on page 21. It should only be disabled after powerdown (ENABLE = 0). Bits 13:0 of register 07h must be preserved as 0x0100 while in powerdown and as 0x3C04 while in powerup. Refer to Si4702/03 Internal Crystal Oscillator Errata. 14 AHIZEN Audio High-Z Enable. ...
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... Name Type Reset value = 0x0000 Bit Name 15:0 Reserved Reserved. If written, these bits should be read first and then written with their pre-existing val- ues. Do not write during powerup. D11 D10 Reserved R/W Function D11 D10 Reserved R/W Function Rev. 1.1 Si4702/03-C19 ...
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... Si4702/03-C19 Register 0Ah. Status RSSI Bit D15 D14 D13 D12 Name RDSR STC SF/BL AFCRL RDSS BLERA[1:0] Type Reset value = 0x0000 Bit Name 15 RDSR RDS Ready RDS group ready (default New RDS group ready. Refer to “4.4. RDS/RBDS Processor and Functionality”. ...
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... Mono Stereo. Stereo indication is also available on GPIO3 by setting GPIO3 04h[5:4] = 01. 7:0 RSSI[7:0] RSSI (Received Signal Strength Indicator). RSSI is measured units of dBµ increments with a maximum of approximately 75 dBµV. Si4702/03-C19 does not report RSSI levels greater than 75 dBuV. Si4702/03-C19 Function Rev. 1.1 33 ...
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... Si4702/03-C19 Register 0Bh. Read Channel Bit D15 D14 D13 D12 D11 Name BLERB[1:0] BLERC[1:0] BLERD[1:0] Type R R Reset value = 0x0000 Bit Name 15:14 BLERB[1:0] RDS Block B Errors errors requiring correction 1–2 errors requiring correction 3–5 errors requiring correction errors or error in checkword, correction not possible. ...
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... Reset value = 0x0000 Bit Name 15:0 RDSA RDS Block A Data. Register 0Dh. RDSB Bit D15 D14 D13 D12 Name Type Reset value = 0x0000 Bit Name 15:0 RDSB RDS Block B Data. D11 D10 RDSA[15:0] R Function D11 D10 RDSB[15:0] R Function Rev. 1.1 Si4702/03-C19 ...
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... Si4702/03-C19 Register 0Eh. RDSC Bit D15 D14 D13 D12 Name Type Reset value = 0x0000 Bit Name 15:0 RDSC RDS Block C Data. Register 0Fh. RDSD Bit D15 D14 D13 D12 Name Type Reset value = 0x0000 Bit Name 15:0 RDSD RDS Block D Data. ...
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... Pin Descriptions: Si4702/03-C19 FMIP RFGND GND RST Pin Number(s) Name FMIP 3 RFGND 4, 12, 15, PAD GND 5 RST 6 SEN 7 SCLK 8 SDIO 9 RCLK ROUT 14 LOUT 17, 18, 19 GPIO3, GPIO2, GPIO1 GND PAD Top View Description No Connect. Leave floating inputs. RF ground. Connect to ground plane on PCB. Ground. Connect to ground plane on PCB. ...
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... Si4702/03-C19 8. Ordering Guide Part Description Number* Si4702-C19-GM Portable Broadcast Radio Tuner FM Stereo Si4703-C19-GM Portable Broadcast Radio Tuner FM Stereo with RDS *Note: Add an “(R)” at the end of the device part number to denote tape and reel option; 2500 quantity per reel. 38 Package Type ...
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... Line 2 Marking Die Revision TTT = Internal Code Line 3 Marking: Circle = 0.5 mm Diameter (Bottom-Left Justified Year WW = Workweek Figure 10. Si4702 Top Mark Figure 11. Si4703 Top Mark 02 = Si4702 03 = Si4703 19 = Firmware Revision Revision C Die Internal tracking code. Pin 1 Identifier Assigned by the Assembly House. Corresponds to the last sig- nificant digit of the year and workweek of the mold date ...
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... Si4702/03-C19 10. Package Outline: Si4702/03-C19 Figure 12 illustrates the package details for the Si4702/03-C19. Table 10 lists the values for the dimensions shown in the illustration. Figure 12. 20-Pin Quad Flat No-Lead (QFN) Symbol Millimeters Min Nom A 0.50 0.55 A1 0.00 0.02 b 0.18 0.25 c 0.27 0.32 D 3.00 BSC D2 1 ...
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... PCB Land Pattern: Si4702/03-C19 Figure 13 illustrates the PCB land pattern details for the Si4702/03-C19. Table 11 lists the values for the dimensions shown in the illustration. Figure 13. PCB Land Pattern Rev. 1.1 Si4702/03-C19 41 ...
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... Si4702/03-C19 Table 11. PCB Land Pattern Dimensions Symbol Millimeters Min 2.10 Notes: General 1. All dimensions shown are in millimeters (mm) unless otherwise noted. 2. Dimensioning and Tolerancing is per the ANSI Y14.5M-1994 specification. 3. This Land Pattern Design is based on IPC-SM-782 guidelines. 4. All dimensions shown are at Maximum Material Condition (MMC). Least Material Condition (LMC) is calculated based on a Fabrication Allowance of 0 ...
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... AN299: External 32.768 kHz Crystal Oscillator AN383: Antenna Selection and Universal Layout Guidelines Si4702/03 Internal Crystal Oscillator Errata Si4700/01/02/03 Customer Support Site: This site contains all application notes, evaluation board schematics and layouts, and evaluation software. NDA is required for access. To request access, register at http://www.mysilabs.com and send user’s first and last name, company, NDA reference number, and mysilabs user name to fminfo@silabs ...
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... Updated “4. Functional Description”. Updated “5. Register Summary”. Updated “6. Register Descriptions”. Updated “7. Pin Descriptions: Si4702/03-C19”. Revision 1.0 to Revision 1.1 Updated Table 8 on page 12. Updated “4.11. Initialization Sequence”. ...
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... N : OTES Si4702/03-C19 Rev. 1.1 45 ...
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... Si4702/03-C19 C I ONTACT NFORMATION Silicon Laboratories Inc. 400 West Cesar Chavez Austin, Texas 78701 Tel:1+ (512) 416-8500 Fax:1+ (512) 416-9669 Toll Free:1+ (877) 444-3032 Email: FMinfo@silabs.com Internet: www.silabs.com The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. ...