ATA3745P3-TGQY Atmel, ATA3745P3-TGQY Datasheet - Page 18

• Manufacturer Part Number: ATA3745P3-TGQY
• Description: IC UHF ASK/FSK RECEIVER 20SOIC
• Manufacturer: Atmel

Specifications of ATA3745P3-TGQY

• Frequency: 310MHz ~ 440MHz
• Sensitivity: -108dBm
• Data Rate - Maximum: 10 kBaud
• Modulation Or Protocol: ASK, FSK
• Applications: RKE, TPM, Security Systems
• Current - Receiving: 7mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SOIC (0.300", 7.50mm Width)
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Memory Size: -
• Lead Free Status / Rohs Status: Compliant
• Other names: ATA3745P3-TGQYTR

5.5
Table 5-2.
18
OFF Command
OPMODE Register
LIMIT Register
Bit1 Bit2
(Default)
(Default)
1
0
0
0
0
1
1
0
0
Configuration of the Receiver
ATA3745
Lim_min5 Lim_min4 Lim_min3 Lim_min2 Lim_min1 Lim_min0 Lim_max5 Lim_max4 Lim_max3 Lim_max2 Lim_max1 Lim_max0
Baud1
Bit2
0
0
Effect of the Configuration Words within the Registers
BR_Range
Baud0
Bit4
0
0
The ATA3745 receiver is configured via two 12-bit RAM registers called OPMODE and LIMIT.
The registers can be programmed by means of the bi-directional DATA port. If the register
contents have changed due to a voltage drop, this condition is indicated by a certain output
pattern called reset marker (RM). The receiver must be reprogrammed in that case. After a
power-on reset (POR), the registers are set to default mode. If the receiver is operated in
default mode, there is no need to program the registers.
Table 5-2
programming the registers: bit 1 defines if the receiver is set back to polling mode via the OFF
command (see
ister address. It selects the appropriate register to be programmed.
Table 5-1.
Table 5-3 on page 19
words. The default configuration is highlighted for each word.
BR_Range sets the appropriate baud rate range. At the same time it defines XLim. XLim is
used to define the bit check limits T
POUT can be used to control the sensitivity of the receiver. In that application, POUT is set to
“1” to reduce the sensitivity. This implies that the receiver operates with full sensitivity after a
POR.
BitChk1
Bit5
1
1
Lim_min
Bit 1
N
Bitcheck
1
0
0
BitChk0
shows the structure of the registers.
Bit6
0
1
Effect of Bit 1 and Bit 2 in Programming the Registers
“Receiving Mode” on page
POUT
V
Bit7
POUT
Bit 2
0
1
x
1
0
and the following illustrate the effect of the individual configuration
Sleep4
Bit8
0
0
Action
The receiver is set back to polling mode (OFF command)
The OPMODE register is programmed
The LIMIT register is programmed
Lim_min
Sleep3
Bit9
1
0
and T
15), or if it is programmed. Bit 2 represents the reg-
Table 5-1
Lim_max
Sleep2
Bit10
Sleep
0
1
as shown in
Sleep1
shows the effect of bit 1 and bit 2 in
Bit11
1
1
Lim_max
Sleep0
Table 5-3 on page
Bit12
1
0
X
Bit13
Sleep Std
0
0
4901B–RKE–11/07
X
Sleep
X
Sleep Temp
19.
Bit14
0
0