MC33591FTA Freescale Semiconductor, MC33591FTA Datasheet - Page 10

IC RF RECEIVER 315,434MHZ 24LQFP

MC33591FTA

Manufacturer Part Number
MC33591FTA
Description
IC RF RECEIVER 315,434MHZ 24LQFP
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC33591FTA

Frequency
315MHz, 434MHz
Sensitivity
-105dBm
Data Rate - Maximum
11 kBaud
Modulation Or Protocol
FSK, OOK
Applications
General Data Transfer
Current - Receiving
5.7mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Voltage - Supply
1.9 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
24-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC33591FTAE
Manufacturer:
Freescal
Quantity:
18
CONFIGURATION REGISTERS
bits may lead to unexpected configurations. The first bit transmitted on MOSI does not change the content of the
configuration registers. Note that a low level applied on RESETB does not affect the configuration register
content.
sends received data on the MOSI line and the recovered clock on SCLK. It is then recommended that the MCU
SPI is set as slave. If the data received does not fit in an entire number of bytes, the data manager will fill the last
byte. If the data received constitute an whole number of bytes, the data manager may generate and send an
extra byte whose content is irrelevant. If DME=0, the SPI is disabled. Raw data is sent on the MOSI line.
master, it is recommended that the MCU SPI is set as slave before the mode transition.
rows on tables 4, 7 & 8). In this configuration, the SPI is disabled and ROMEO2 sends raw data on the MOSI line.
This default configuration enables the circuit to operate as a standalone receiver without any external control.
After POR, RESETB forces a low level. Therefore an external pull-up resistor should be used in order to avoid
entering configuration mode.
CONFIGURATION REGISTERS
10
When RESETB is set to a high level, if Data Manager is enabled (DME=1), ROMEO2 becomes master and
When ROMEO2 SPI is changed from master (run mode) to slave (configuration mode) or from slave to
At power-on, the POR resets the internal registers. This defines the receiver default configuration (see gray
Table 4 describes the Configuration Register 1 (CR1).
0
1
1
MCU (master)
MCU (master)
MCU (master)
Reset value
Don’t care
Bit name
CR1
CR1
Figure 12: Writing into configuration registers
Figure 13: Reading configuration registers
Freescale Semiconductor, Inc.
R/W
bit 7
1
For More Information On This Product,
Table 4: Configuration Register 1
MC33591 Technical Data
bit 6
CF
1
Go to: www.freescale.com
Don’t care
CR2
CR2
MOD
bit 5
0
SOE
bit 4
1
SR1
bit 3
0
ROMEO2
ROMEO2
ROMEO2
Don’t care
bit 2
SR0
1
CR3
CR3
DME
bit 1
0
bit 0
MOTOROLA
HE
0
SCLK line
MOSI line
SCLK line
MISO line
MOSI line

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