ATMEGA256RZAV-8AU Atmel, ATMEGA256RZAV-8AU Datasheet - Page 37

• Manufacturer Part Number: ATMEGA256RZAV-8AU
• Description: MCU ATMEGA2561/AT86RF230 64-TQFP
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA256RZAV-8AU

• Frequency: 2.4GHz
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: ISM, ZigBee™
• Power - Output: 3dBm
• Sensitivity: -101dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 15.5mA
• Current - Transmitting: 16.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 256kB Flash, 4kB EEPROM, 8kB RAM
• Antenna Connector: PCB, Surface Mount
• Package / Case: 64-TQFP
• Wireless Frequency: 2.4 GHz
• Interface Type: JTAG, SPI
• Output Power: 3 dBm
• For Use With: ATAVRISP2 - PROGRAMMER AVR IN SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Data Rate - Maximum: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: ATmega256

Figure 7-9 Timing Example of a TX_ARET Transaction
7.2.3.3 RX_AACK_ON_NOCLK – RX_AACK_ON without CLKM
7.2.4 Interrupt Handling in Extended Operating Mode
5131E-MCU Wireless-02/09
Typ. Processing Delay
TRX_STATE
FrameType
SLP_TR
RX/TX
IRQ
Register settings:
TX_ARET_ON
0x2C: MAX_FRAME_RETRIES=0
0x2C: MAX_CSMA_RRTRIES=0
0x2E: MIN_BE=0
0
128 s
μ
If the AT86RF230 is listening for an incoming frame and the microcontroller is not
running an application, the microcontroller can be powered down to decrease the total
system power consumption. This special power-down scenario for systems running in
clock synchronous mode (see section 6.4) is supported by the AT86RF230 using the
state RX_AACK_ON_NOCLK. The radio transceiver functionality in this state is based
on that in state RX_AACK_ON (see section 7.2.3.1), only the clock on pin CLKM is
disabled.
The RX_AACK_ON_NOCLK state is entered from RX_AACK_ON by a rising edge at
SLP_TR pin. The return to RX_AACK_ON state results either from a successful frame
reception or a falling edge on pin SLP_TR.
The CLKM pin is disabled 35 clock cycles after the rising edge at SLP_TR pin. This
allows the microcontroller to complete its power-down sequence.
In case of frame reception, the radio transceiver enters the BUSY_RX_AACK_ON state
and parses the address field and the FCS of the incoming frame. If it passes address
filtering and has a correct FCS the frame is accepted and the radio transceiver state
changes to BUSY_RX_AACK, the TRX_END interrupt is issued and CLKM is turned
on. If an ACK was requested the radio transceiver follows the procedure described in
section 7.2.3.1.
After the transaction has been completed, the radio transceiver enters the
RX_AACK_ON state. Note, the radio transceiver reenters the RX_AACK_ON_NOCLK
state only, when the next rising edge at SLP_TR pin occurs.
The interrupts in the Extended Operating Mode are handled slightly different compared
to the Basic Operating Mode (see section 7.1.3). The number of possible interrupts is
reduced to a necessary minimum of events. This minimizes the interaction between
microcontroller and AT86RF230 to reduce the overall power consumption. The
differences in the interrupt handling are described in Table 7-5.
128
16 s
Data Frame (Length = 10, ACK=1)
μ
TX
BUSY_TX_ARET
672
32 s
μ
x
RX
ACK Frame
x+352
AT86RF230
TX_ARET_ON
TRX_END
16 s
μ
time [ s]
μ
37