AT86RF211SAH-R Atmel, AT86RF211SAH-R Datasheet - Page 22

• Manufacturer Part Number: AT86RF211SAH-R
• Description: IC RF TXRX FSK 400-950MHZ 48TQFP
• Manufacturer: Atmel

Specifications of AT86RF211SAH-R

• Frequency: 400MHz ~ 950MHz
• Data Rate - Maximum: 100kbps
• Modulation Or Protocol: FSK
• Applications: ISM
• Power - Output: 7dBm ~ 12dBm
• Sensitivity: -107dBm
• Voltage - Supply: 2.4 V ~ 3.6 V
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-TQFP Exposed Pad, 48-eTQFP, 48-HTQFP, 48-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Memory Size: -
• Current - Transmitting: -
• Current - Receiving: -

2.2.12
2.2.12.1
2.2.12.2
22
AT86RF211S
Data Slicer
External Mode
Internal Mode
Hereafter is an example of a possible configuration in the 600 kHz-wide 868 to 868.6
MHz European sub-band, in which the European standard EN 300 220 is applicable:
For further details, please refer to the Application Note
Selection for the AT86RF211S”
The analog signals at the discriminator’s output (DISCOUT, pin 27) are converted into
CMOS level data by a high resolution comparator called a data slicer.
The data slicer has a reference for its comparator that can be chosen using CTRL1[4].
The reference sets the comparator’s comparison level. One option is to extract the aver-
age value of the demodulated signal on the SKFILT pin (pin 25), described below as the
external mode. The other option is to set an absolute value for this reference, described
below as the internal mode.
The external mode takes the average value of the demodulated signal as the compari-
son level for the comparator. There must be sufficient transitions in the message to
ensure that the average value remains between the 0 and 1 levels. Manchester encod-
ing can be used in this mode as well as DC-free encoding schemes. The choice of
SKFILT capacitor value is a trade-off between the maximum duration of a constant bit
(whether 0 or 1) and the maximum allowed settling time to charge this capacitor after
power-up.
Note:
The internal mode uses the output of a DAC as the comparison level. Once this thresh-
old has been correctly set, an "absolute" data slicing of the demodulated signal is
possible—there is no need for a DC-free modulation scheme (it is possible to send a 0
or a 1 infinitely).
• SDB: 4 channels at 19.200 bps
• MDB: 2 channels at 5.000 bps
• WDB: 1 channel at 100.000 bps
The SKFILT pin is in a high impedance state during the "sleep" period of the wake-up
mode, so that the level is kept constant and there is no need to charge this tank again.
, reference 5418A
"“Data Demodulation and Crystal
5348B–WIRE–03/06