SI4010-B1-GT Silicon Laboratories Inc, SI4010-B1-GT Datasheet - Page 94
SI4010-B1-GT
Manufacturer Part Number
SI4010-B1-GT
Description
IC TX 27-960MHZ FSK 3.6V 10MSOP
Manufacturer
Silicon Laboratories Inc
Series
EZRadio®r
Type
ISM Transmitterr
Datasheets
1.4010-DAAKF_434.pdf
(2 pages)
2.SI4010-B1-GS.pdf
(160 pages)
3.SI4010-C2-GS.pdf
(156 pages)
Specifications of SI4010-B1-GT
Package / Case
10-MSOP, Micro10™, 10-uMAX, 10-uSOP
Frequency
27MHz ~ 960MHz
Applications
Garage Openers, RKE, Security Alarms
Modulation Or Protocol
FSK, OOK
Data Rate - Maximum
100 kBaud
Power - Output
10dBm
Current - Transmitting
19.8mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Memory Size
4kB RAM
Features
8051 MCU Core, Crystal-less Operation
Voltage - Supply
1.8 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Operating Frequency
27 MHz to 960 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Operating Supply Voltage
1.8 V to 3.6 V
Supply Current
10 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
336-1973-5
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Si4010-C2
SFR Definition 26.1. IE
SFR Address = 0xA8; Bit-Addressable
94
Name
Reset
Bit
Type
7
6
5
4
3
2
1
0
Bit
ETMR3
ETMR2
EINT1
EODS
EDMD
EINT0
Name
ERTC
EA
R/W
EA
7
0
Enable All Interrupts.
Globally enables/disables all interrupts. It overrides individual interrupt mask settings.
0: Disable all interrupt sources.
1: Enable each interrupt according to its individual mask setting.
Enable External Edge Interrupt 1.
This bit sets the masking of External Interrupt 1.
0: Disable external interrupt 1.
1: Enable interrupt requests generated by the INT1 input.
Enable Timer 3 Interrupt.
This bit sets the masking of the Timer 3 interrupt.
0: Disable Timer 3 interrupt.
1: Enable interrupt requests generated by the TF3L or TF3H flags.
Enable Output Data Serializer Interrupt.
This bit sets the masking of the ODS interrupt.
0: Disable ODS interrupt.
1: Enable ODS interrupt.
Enable Real Time Clock Interrupt.
This bit sets the masking of the RTC interrupt.
0: Disable all RTC interrupt.
1: Enable RTC interrupt.
Enable DMD (TS Demodulator).
This bit sets the masking of the DMD interrupt.
0: Disable DMD interrupt.
1:Enable DMD interrupt.
Enable Timer 2 Interrupt.
This bit sets the masking of the Timer 2 interrupt.
0: Disable all Timer 2 interrupt.
1: Enable interrupt requests generated by the TF2 flag.
Enable External Edge Interrupt 0.
This bit sets the masking of External Interrupt 0.
0: Disable external interrupt 0.
1: Enable interrupt requests generated by the INT0 input.
EINT1
R/W
6
0
ETMR3
R/W
5
0
EODS
R/W
Rev. 1.0
4
0
Function
ERTC
R/W
3
0
EDMD
R/W
2
0
ETMR2
R/W
1
0
EINT0
R/W
0
0
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