AS3977-BQFU austriamicrosystems, AS3977-BQFU Datasheet - Page 30

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AS3977-BQFU

Manufacturer Part Number
AS3977-BQFU
Description
IC RF TRANSMITTER FSK 16-QFN
Manufacturer
austriamicrosystems
Datasheet

Specifications of AS3977-BQFU

Frequency
300MHz ~ 928MHz
Applications
ISM
Modulation Or Protocol
FSK
Data Rate - Maximum
100 kbps
Power - Output
10dBm
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Voltage - Supply
2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
16-VQFN Exposed Pad, 16-HVQFN, 16-SQFN, 16-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Memory Size
-
Current - Transmitting
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AS3977-BQFU
Manufacturer:
AMS
Quantity:
1 001
AS3977
Data Sheet - A p p l i c a t i o n I n f o r m a t i o n
Table 23. Configuration Registers Description
www.austriamicrosystems.com
Modulation and Power Amplifier section
H<15:14>
E<15:10>
F<15:10>
Register
C<14:5>
D<15:0>
G<15:4>
H<13:4>
B<15:5>
J<10:7>
G<3:0>
I<15:8>
C<4:0>
E<9:0>
F<9:0>
H<3:0>
J<5:2>
C<15>
I<7:0>
B<0>
B<1>
B<2>
B<3>
B<4>
J<0>
J<1>
J<6>
INT1<9:0>
INT2<9:0>
INT3<9:0>
INT4<9:0>
DF<7:0>
reserved
PN9INT
REGEN
FRAC1
PLLON
FRAC2
FRAC3
FRAC4
ATCPH
<15:0>
<15:0>
<15:0>
<15:0>
Name
GFCS
GFBP
<7:0>
<3:0>
SD3
-
application dependent
application dependent
application dependent
application dependent
application dependent
application dependent
application dependent
application dependent
application dependent
application dependent
Default Value
Revision 3.5
0000
0000
00
0
1
0
0
0
1
0
1
0
0: normal mode of operation
1: reserved for test purposes only
ΣΔ order selection
0: MASH2
1: MASH3
0: reserved Bit; set to zero
0: normal mode
1: reserved for test purposes only
0: normal mode
1: reserved for test purposes only
0: Phase locked loop off
1: Phase locked loop on
Synthesizer fractional setting 2
Synthesizer integer setting 2
Synthesizer fractional setting 3
Synthesizer integer setting 3
Synthesizer fractional setting 4
Synthesizer integer setting 4
reserved Bits: set to Binary 00 for normal
mode of operation
Gaussian filter clock setting
FSK deviation setting
Gaussian filter bypass
0: not bypassed
1: bypassed
0: Turn off the VDD RF Regulator
1: Turn on the VDD RF Regulator
reserved Bits: set to Binary 0000 for normal
mode of operation
reserved Bit should be set to 0
Antenna tuning circuit phase shift setting
0 (0000): minimum capacitor
:
:
15 (1111): maximum capacitor
Synthesizer fractional setting 1
Synthesizer integer setting 1
Description
30 - 45

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