LRI64-SBN18/1GE STMicroelectronics, LRI64-SBN18/1GE Datasheet
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LRI64-SBN18/1GE
Specifications of LRI64-SBN18/1GE
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LRI64-SBN18/1GE Summary of contents
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... ISO 15693 compliant ■ ISO 18000-3 Mode 1 compliant 13.56 MHz ±7 kHz carrier frequency ■ ■ Supported data transfer to the LRI64: 10% ASK modulation using “1-out-of-4” pulse position coding (26 Kbit/s) ■ Supported data transfer from the LRI64: Load modulation using Manchester coding with ...
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... VCD to LRI64 frames . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 8 Communications signal from LRI64 to VCD . . . . . . . . . . . . . . . . . . . . . 14 8.1 Load modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 8.2 Subcarrier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 8.3 Data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 8.4 Bit representation and coding using one subcarrier, at the high data rate 14 8.4.1 8.4.2 9 LRI64 to VCD frames . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 9.1 LRI64 SOF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2/49 Logic Logic LRI64 ...
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... LRI64 EOF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 10 Special fields . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 10.1 Unique identifier (UID 10.2 Application family identifier (AFI 10.3 Data storage format identifier (DSFID 10.4 Cyclic redundancy code (CRC LRI64 protocol description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 12 LRI64 states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 12.1 Power-off state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 12.2 Ready state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 12.3 Quiet state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 13 Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 13.1 Addressed mode ...
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... Get System Info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 19 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 21 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 22 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Appendix A Algorithm for pulsed slots . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Appendix B C-example to calculate or check the CRC16 according to ISO/IEC 13239 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 22.1 CRC calculation example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Appendix C Application family identifier (AFI) coding . . . . . . . . . . . . . . . . . . . . 47 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 4/49 LRI64 ...
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... LRI64 List of tables Table 1. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 2. 10% modulation parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 3. Request flags Table 4. Request flags (when bit Table 5. Request flags (when bit Table 6. Response flags Table 7. Response error code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Table 8. Timing values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Table 9. Command codes Table 10. Block lock status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Table 11. ...
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... Get System Info, response frame format, when Error_Flag is set . . . . . . . . . . . . . . . . . . . 37 Figure 37. Get System Info frame exchange between VCD and LRI64 . . . . . . . . . . . . . . . . . . . . . . . 38 Figure 38. LRI64 synchronous timing, transmit and receive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Figure 39. UFDFPN8 (MLP8) 8-lead ultra thin fine pitch dual flat package no lead 2 × 3 mm, package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 ...
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... LRI64 at 26 Kbit/s, using the “1-out-of-4” pulse encoding mode. Outgoing data are sent by the LRI64, generated by load variation on the carrier wave, using Manchester coding with a single subcarrier frequency of 423 kHz. The data are transferred from the LRI64 to the reader at 26 Kbit/s, in the high data rate mode. ...
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... Figure 3. LRI64 memory mapping The LRI64 uses the first 8 blocks (blocks store the 64-bit unique identifier (UID). The UID is used during the anticollision sequence (Inventory written, by ST, at time of manufacture, but part of it can be customer-accessible and customer-writable, on special request ...
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... Used to perform the anticollision sequence. The LRI64 answers to the Inventory command when all of the 64 bits of the UID have been correctly written. 3.2 Stay Quiet Used to put the LRI64 in Quiet mode. In this mode, the LRI64 only responds to commands in Addressed mode. 3.3 Read Block Used to output the 8 bits of the selected block ...
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... Power transfer Power transfer to the LRI64 is accomplished by inductive coupling of the 13.56 MHz radio signal between the antennas of the LRI64 and VCD. The RF field transmitted by the VCD induces an AC voltage on the LRI64 antenna, which is then rectified, smoothed and voltage- regulated. Any amplitude modulation present on the signal is demodulated by the amplitude shift keying (ASK) demodulator ...
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... The LRI64 only supports the 10% modulation mode specified in ISO 15693 and ISO 18000- 3 Mode 1 standards. Any request that the VCD might send using the 100% modulation mode, is ignored, and the LRI64 remains in its current state. However, the LRI64 is, in fact, operational for any degree of modulation index from between 10% and 30%. ...
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... Data rate and data coding The data coding method involves pulse position modulation. The LRI64 supports the “1-out- of-4” pulse coding mode. Any request that the VCD might send in the “1-out-of-256” pulse coded mode, is ignored, and the LRI64 remains in its current state. ...
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... Request frames are delimited by a start of frame (SOF) and an end of frame (EOF) and are implemented using a code violation mechanism. Unused options are reserved for future use. The LRI64 is ready to receive a new command frame from the VCD after a delay of t Table 14) after having sent a response frame to the VCD. ...
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... S 8.3 Data rate The LRI64 response uses the high data rate format (26.48 Kbit/s). The selection of the data rate is made by the VCD using the second bit in the protocol header. 8.4 Bit representation and coding using one subcarrier, at the ...
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... LRI64 8.4.2 Logic 1 A logic 1 starts with an unmodulated period of 18.88 µs followed by 8 pulses of 423.75 kHz (f /32) as shown in C Figure 10. Logic 1, high data rate Communications signal from LRI64 to VCD Figure 10. 37.76 µs AI06664 15/49 ...
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... Response frames are delimited by a start of frame (SOF) and an end of frame (EOF) and are implemented using a code violation mechanism. The LRI64 supports these in the one subcarrier mode, at the fast data rate, only. The VCD is ready to receive a response frame from the LRI64 before 320.9µs (t having sent a command frame. 9.1 ...
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... Special fields 10.1 Unique identifier (UID) Members of the LRI64 family are uniquely identified by a 64-bit unique identifier (UID). This is used for addressing each LRI64 device uniquely and individually, during the anticollision loop and for one-to-one exchange between a VCD and an LRI64. The UID complies with ISO/IEC 15963 and ISO/IEC 7816- read-only code, and comprises (as summarized in ● ...
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... The 2-byte CRC is appended to each request and each response, within each frame, before the EOF. The CRC is calculated on all the bytes after the SOF the CRC field. Upon reception of a request from the VCD, the LRI64 verifies that the CRC value is valid invalid, it discards the frame, and does not answer the VCD. ...
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... LRI64 protocol description The Transmission protocol defines the mechanism to exchange instructions and data between the VCD and the LRI64, in each direction. Based on “VCD talks first”, the LRI64 does not start transmitting unless it has received and properly decoded an instruction sent by the VCD. ...
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... LRI64 protocol description Figure 17. LRI64 response frame format Response Figure 18. LRI64 protocol timing Request Frame VCD VICC Timing 20/49 Response Parameters Data SOF Flags Response Frame t1 t2 2-Byte Response CRC EOF Request Frame Response Frame t1 LRI64 AI09728 t2 AI06830B ...
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... Power-off state The LRI64 is in the Power-off state when it receives insufficient energy from the VCD. 12.2 Ready state The LRI64 is in the Ready state when it receives enough energy from the VCD. It answers to any request in Addressed and Non-addressed modes. 12.3 Quiet state When in the Quiet state, the LRI64 answers to any request in Addressed mode ...
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... Non-addressed mode (general request) When the Address_flag is set to 0 (Non-addressed mode), the request does not contain a Unique ID field. Any LRI64 device receiving a request in which the Address_flag is set to 0, executes the request and returns a response to the VCD as specified by the command description. ...
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... Address flag (1) 7 Option flag (1) 8 RFU 1. Only bit 6 (Address flag) can be configured for the LRI64. All others bits (5, 7 and 8) must be reset to 0. (1) Value Single subcarrier frequency mode. 0 (Option 1 is not supported) High data rate mode. 1 (Option 0 is not supported) ...
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... RFU 6 RFU 7 RFU 8 RFU 14.3 Response error code If the Error flag is set by the LRI64 in the response, the error code field is present and provides information about the error that occurred. supported by the LRI64. Table 7. Response error code Error code 0Fh 24/49 (1) Value ...
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... To switch to the next slot, the VCD sends another EOF. The following rules and restrictions apply: ● LRI64 answer is detected, the VCD may switch to the next slot by sending an EOF ● if one or more LRI64 answers are detected, the VCD waits until the complete frame has been received before sending an EOF, to switch to the next slot ...
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... MSB 100 1100 1111 b 11 bits MSB LSB xxxx MSB xxxx 100 1100 1111 b UID b63 xxxx xxxx ..... xxxx xxxx x xxx xxxx xxxx xxxx Bits ignored Compare LRI64 LSB LSB 4 bits LSB 15 bits b0 64 bits b AI06682 ...
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... LRI64 16 Request processing by the LRI64 Upon reception of a valid request, the LRI64 performs the following algorithm, where: ● NbS is the total number of slots (1 or 16) ● the current slot number (0 to 15) ● The LSB(value,n) function returns the n least significant bits of value ● ...
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... The VCD sends an Inventory request frame, terminated by a EOF. The number of slots is 16. ● LRI64 #1 transmits its response in slot the only one to do so, therefore no collision occurs and its UID is received and registered by the VCD; ● The VCD sends an EOF, to switch to the next slot. ...
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... LRI64 Figure 21. Description of a possible anticollision sequence between LRI64 devices Request processing by the LRI64 29/49 ...
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... EOF received from the LRI64 devices. The EOF sent by the VCD is 10% modulated, independent of the modulation index used for transmitting the VCD request to the LRI64 also the time after which the VCD may send a new request to the LRI64 as described in 2 Figure 18. ...
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... VCD new request delay when there is no LRI64 response the time after which the VCD may send an EOF to switch to the next slot when no LRI64 3 response has been received. The EOF sent by the VCD is 10% modulated, independent of the modulation index used for transmitting the VCD request to the LRI64 ...
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... AFI, if the AFI flag is set ● Mask length ● Mask value ● 2-byte CRC (Figure In case of errors in the Inventory request frame, the LRI64 does not generate any answer. The response frame ● Response flags ● DSFID ● Unique ID ● 2-byte CRC (Figure Figure 22 ...
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... LRI64 does not process any request in which the Inventory_flag is set ● the LRI64 responds to commands in the Addressed mode if the UID matches The LRI64 exits the Quiet state when it is taken to the Power Off state Figure 24. Stay Quiet, request frame format Request ...
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... Command codes 18.3 Read Single Block When receiving the Read Single Block command, the LRI64 reads the requested block and sends back its 8-bit value in the response. The Option_Flag is supported. The Read Single Block can be issued in both addressed and non addressed modes. ...
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... Write Single Block When receiving the Write Single Block command, the LRI64 writes the requested block with the data contained in the request and report the success of the operation in the response. The Option_Flag is not supported and must be set to 0. The Write Single Block can be issued in both addressed and non addressed modes ...
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... Command codes Figure 32. Write Single Block, response frame format, when Error_Flag is set Figure 33. Write Single Block frame exchange between VCD and LRI64 SOF VCD VICC VICC 36/49 Response Response Error 2-Byte SOF Flags Code 8 bit 8 bits 16 bits 01h 0Fh Write Single ...
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... DSFID value (as written in block 9) ● AFI value (as written in block 8) ● Memory size: for the LRI64, there are 15 blocks (0Eh byte (00h). ● IC Reference: only the 6 most significant bits are used. The product code of the LRI64 is 00 0101 =5 b ● 2-byte CRC ...
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... Command codes Figure 37. Get System Info frame exchange between VCD and LRI64 VCD VICC 38/49 Get System SOF EOF Info Request SOF t1 Get System EOF Info Response AI09724 LRI64 ...
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... LRI64 19 Maximum rating Stressing the device above the rating listed in the absolute maximum ratings table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability ...
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... T Ambient operating temperature A Figure 38. LRI64 synchronous timing, transmit and receive Figure 38 shows an ASK modulated signal, from the VCD to the LRI64. The test condition for the AC/DC parameters are: ● Close coupling condition with tester antenna (1mm) ● Gives LRI64 performance on tag antenna Table 13 ...
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... A 2. All timing measurements were performed on a reference antenna with the following characteristics: External size Number of turns: 6 Width of conductor Space between 2 conductors: 0.4 mm Value of the tuning capacitor: 28.5 pF (LRI64-W4) Value of the coil: 4.3 µH Tuning Frequency: 14.4 MHz. Test Parameter conditions ...
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... Package mechanical data 21 Package mechanical data In order to meet environmental requirements, ST offers the LRI64 in ECOPACK These packages have a Lead-free second-level interconnect. The category of second-level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ...
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... JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. For a list of available options (speed, package, etc.) or for further information on any aspect of this device, please contact your nearest ST sales office. LRI64 (1) O -free and TBBA-free ...
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... LRI64 is inventoried then store (LRI64_UID) else ; remember a collision was detected push(mask,address) endif next sub_address if stack_not_empty ...
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... ISO/IEC 13239 The cyclic redundancy check (CRC) is calculated on all data contained in a message, from the start of the flags through to the end of Data. This CRC is used from VCD to LRI64 and from LRI64 to VCD. To add extra protection against shifting errors, a further transformation on the calculated CRC is made. The One’ ...
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... CRC is 0x%04X\n", current_crc_value); // current_crc_value is now ready to be appended to the data stream // (first LSByte, then MSByte) } else // check CRC { if (current_crc_value == CHECK_VALUE) { printf ("Checked CRC is ok (0x%04X)\n", current_crc_value); } else { printf ("Checked CRC is NOT ok (0x%04X)\n", current_crc_value 46/49 current_crc_value = (current_crc_value >> current_crc_value = (current_crc_value >> 1); LRI64 ...
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... AFI (application family identifier) represents the type of application targeted by the VCD and is used to extract from all the LRI64 present only the LRI64 meeting the required application criteria programmed by the LRI64 issuer (the purchaser of the LRI64). Once locked, it can not be modified. The most significant nibble of AFI is used to code one specific or all application families, as ...
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... UFDFPN8 inch values calculated from millimeters rounded to four decimal digits (see Table 15: UFDFPN8 (MLP8) 8-lead ultra thin fine pitch dual flat package no lead 2 × 3 mm, package mechanical LRI64 products are no longer delivered in A1 inlays and A6 and A7 antennas added for UFDPFN8 package in STG ratings ...
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... LRI64 Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...