PIC16LF1824-I/SL Microchip Technology, PIC16LF1824-I/SL Datasheet

IC PIC MCU 8BIT 14KB FLSH 14SOIC

PIC16LF1824-I/SL

Manufacturer Part Number
PIC16LF1824-I/SL
Description
IC PIC MCU 8BIT 14KB FLSH 14SOIC
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheets

Specifications of PIC16LF1824-I/SL

Core Size
8-Bit
Program Memory Size
7KB (4K x 14)
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
11
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
14-SOIC (0.154", 3.90mm Width)
Controller Family/series
PIC16LF
No. Of I/o's
12
Eeprom Memory Size
256Byte
Ram Memory Size
256Byte
Cpu Speed
32MHz
No. Of Timers
5
Processor Series
PIC16LF
Core
PIC
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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PIC16LF1824-I/SL
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MICROCHIP
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0
This document includes the
programming specifications for the
following devices:
1.0
The PIC16F/LF182X and PIC12F/LF1822 devices can
be programmed using either the high-voltage In-Circuit
Serial Programming™ (ICSP™) method or the low-
voltage ICSP™ method.
1.1
1.1.1
In High-Voltage ICSP™ mode, these devices require
two programmable power supplies: one for V
one for the MCLR/V
 2010 Microchip Technology Inc.
PIC16F/LF182X/PIC12F/LF1822 Memory Programming Specification
• PIC12F1822
• PIC16F1823
• PIC16F1824
• PIC16F1825
• PIC16F1826
• PIC16F1827
• PIC16F1828
• PIC16F1829
OVERVIEW
Hardware Requirements
HIGH-VOLTAGE ICSP
PROGRAMMING
• PIC12LF1822
• PIC16LF1823
• PIC16LF1824
• PIC16LF1825
• PIC16LF1826
• PIC16LF1827
• PIC16LF1828
• PIC16LF1829
PP
pin.
PIC16F/LF182X/PIC12F/LF1822
Advance Information
DD
and
1.1.2
In Low-Voltage ICSP™ mode, these devices can be
programmed using a single V
operating range. The MCLR/V
be brought to a different voltage, but can instead be left
at the normal operating voltage.
1.1.2.1
The LVP bit in Configuration Word 2 enables single-
supply (low-voltage) ICSP programming. The LVP bit
defaults to a ‘1’ (enabled) from the factory. The LVP bit
may only be programmed to ‘0’ by entering the High-
Voltage ICSP mode, where the MCLR/V
to V
the High-Voltage ICSP mode is available and only the
High-Voltage ICSP mode can be used to program the
device.
Note 1: The High-Voltage ICSP mode is always
IHH
. Once the LVP bit is programmed to a ‘0’, only
2: While in Low-Voltage ICSP mode, MCLR
LOW-VOLTAGE ICSP
PROGRAMMING
available, regardless of the state of the
LVP bit, by applying V
MCLR/V
is always enabled, regardless of the
MCLRE bit, and the port pin can no longer
be used as a general purpose input.
Single-Supply ICSP Programming
PP
pin.
PP
pin does not have to
DD
DS41390C-page 1
source in the
PP
IHH
pin is raised
to the

Related parts for PIC16LF1824-I/SL

PIC16LF1824-I/SL Summary of contents

Page 1

... PIC16F/LF182X/PIC12F/LF1822 Memory Programming Specification This document includes the programming specifications for the following devices: • PIC12F1822 • PIC12LF1822 • PIC16F1823 • PIC16LF1823 • PIC16F1824 • PIC16LF1824 • PIC16F1825 • PIC16LF1825 • PIC16F1826 • PIC16LF1826 • PIC16F1827 • PIC16LF1827 • PIC16F1828 • PIC16LF1828 • ...

Page 2

... Power Supply P Ground During Programming Pin Type I Clock Input – Schmitt Trigger Input I/O Data Input/Output – Schmitt Trigger Input (1) P Program Mode Select/Programming Power Supply P Power Supply P Ground Advance Information Pin Description , PIC16F/LF1823, Pin Description  2010 Microchip Technology Inc. ...

Page 3

... RB0 RB7/ICSPDAT 7 14 RB1 RB6 13 8 RB5 9 12 RB2 RB4 11 RB3 10  2010 Microchip Technology Inc. FIGURE 2-3: QFN RA 5/MCLR RB0 DD / ICSPCLK FIGURE 2-4: PDIP, SOIC RA3/MCLR/V FIGURE 2-5: DD DFN DD / ICSPCLK RA3/MCLR/V Advance Information 28-PIN DIAGRAM FOR PIC16F1826/1827 AND PIC16LF1826/1827 ...

Page 4

... RC3 RC6 RC7 RB7 RA0/ICSPDAT RA1/ICSPCLK RA2 RC0 RA1/ICSPCLK RA2 PIC16F/LF1828/1829 3 13 RC0 4 12 RC1 5 11 RC2 Advance Information 20-PIN DIAGRAM FOR PIC16F/LF1828 AND PIC16F/LF1829 RA0/ICSPDAT RA1/ICSPCLK 3 RA2 RC0 RC1 RC2 14 7 RB4 RB5 RB6 11 10  2010 Microchip Technology Inc. ...

Page 5

... Reserved 8004h Reserved 8005h Device ID 8006h Configuration Word 1 8007h Configuration Word 2 8008h Calibration Word 1 8009h 800Ah Calibration Word 2 800Bh-81FFh Reserved  2010 Microchip Technology Inc. and 0000 Implemented h 07FF Maps to 0-07FFh 7FFFh 8000h Implemented 8200h Maps to 8000-81FFh FFFFh Advance Information ...

Page 6

... Device ID 8007h Configuration Word 1 8008h Configuration Word 2 Calibration Word 1 8009h 800Ah Calibration Word 2 800Bh-81FFh Reserved DS41390C-page 0000h Implemented 0FFFh Maps to 0-0FFFh 7FFFh 8000h Implemented 8200h Maps to 8000-81FFh FFFFh Advance Information Program Memory Configuration Memory  2010 Microchip Technology Inc. ...

Page 7

... Reserved 8004h Reserved 8005h 8006h Device ID 8007h Configuration Word 1 8008h Configuration Word 2 Calibration Word 1 8009h 800Ah Calibration Word 2 800Bh-81FFh Reserved  2010 Microchip Technology Inc 0000h Implemented 1FFFh Maps to 0-1FFFh 7FFFh 8000h Implemented 8200h Maps to 8000-81FFh FFFFh Advance Information Program Memory ...

Page 8

... The device ID word is located at 8006h. This location is read-only and cannot be erased or modified. ( DEV6 DEV5 DEV4 REV4 REV3 REV2 U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared x = Bit is unknown Advance Information R R DEV3 DEV2 bit REV1 REV0 bit 0  2010 Microchip Technology Inc. ...

Page 9

... DEVICE ID VALUES DEVICE PIC16F1826 PIC16F1827 PIC16LF1826 PIC16LF1827 PIC16F1823 PIC16LF1823 PIC12F1822 PIC12LF1822 PIC16F1824 PIC16LF1824 PIC16F1825 PIC16LF1825 PIC16F1828 PIC16LF1828 PIC16F1829 PIC16LF1829 3.3 Configuration Words There are two Configuration Words, Configuration Word 1 (8007h) and Configuration Word 2 (8008h). The individual bits within these Configuration Words are used to enable or disable device functions such as the Brown-out Reset, code protection and Power-up Timer ...

Page 10

... The entire program memory will be erased when the code protection is turned off. DS41390C-page 10 R/P-1 R/P-1 R/P-1 BOREN1 BOREN0 R/P-1 R/P-1 R/P-1 WDTE1 WDTE0 FOSC2 (1) (2) (1) Advance Information R/P-1 R/P-1 CPD CP bit 7 R/P-1 R/P-1 FOSC1 FOSC0 bit 0 ‘0’ = Bit is cleared x = Bit is unknown P = Programmable Bit  2010 Microchip Technology Inc. ...

Page 11

... FFFh may be modified by EECON control 00 = 000h to FFFh write-protected, no addresses may be modified by EECON control Note 1: The LVP bit cannot be programmed to ‘0’ when Programming mode is entered via LVP. 2: This bit must be programmed as a ‘1’.  2010 Microchip Technology Inc. U-1 R/P-1 R/P-1 — BORV ...

Page 12

... To enter LVP mode, the LSB of the Least Significant nibble must be shifted in first. This sequence on other parts. -first entry PP -first method DD or below DD Advance Information or DD only, without high voltage See Figure 8-8 and Figure 8-9. IL differs from entering the key  2010 Microchip Technology Inc. ...

Page 13

... Increment Address Reset Address Begin Internally Timed Programming Begin Externally Timed Programming End Externally Timed Programming Bulk Erase Program Memory Bulk Erase Data Memory Row Erase Program Memory  2010 Microchip Technology Inc. between the DLY Mapping Binary (MSb … LSb ...

Page 14

... The only way to get back to the program memory (address exit Program/Verify mode or issue the Reset Address command after the configuration memory has been accessed by the Load Configuration command DLY DLY Advance Information 16 15 LSb MSb LSb MSb 0  2010 Microchip Technology Inc. ...

Page 15

... Input mode (high-impedance) after the 16th falling edge of the clock. If the program memory is code-protected (CP), the data will be read as zeros (see Figure 4-4). FIGURE 4-4: READ DATA FROM PROGRAM MEMORY ICSPCLK 0 0 ICSPDAT (from Programmer) ICSPDAT (from device)  2010 Microchip Technology Inc DLY ...

Page 16

... If the address is incremented from address 7FFFh, it will wrap-around to location 0000h. If the address is incremented from FFFFh, it will wrap-around to location 8000h. FIGURE 4-6: INCREMENT ADDRESS 1 2 ICSPCLK 0 1 ICSPDAT DS41390C-page DLY Input DLY Address Advance Information LSb MSb Input Output Next Command Address + 1  2010 Microchip Technology Inc. ...

Page 17

... However, the EEPROM memory address that is being programmed is erased prior to being programmed with internally timed programming. FIGURE 4-8: BEGIN INTERNALLY TIMED PROGRAMMING 1 2 ICSPCLK 0 0 ICSPDAT  2010 Microchip Technology Inc DLY the ...

Page 18

... This delay is longer than the delay ordinarily required between other commands (see Figure 4-10). FIGURE 4-10: END EXTERNALLY TIMED PROGRAMMING 1 2 ICSPCLK 0 ICSPDAT DS41390C-page 18 End Externally Timed Programming PEXT given. This DIS Advance Information Command Next Command  2010 Microchip Technology Inc. ...

Page 19

... FIGURE 4-12: BULK ERASE DATA MEMORY COMMAND 1 ICSPCLK 1 ICSPDAT  2010 Microchip Technology Inc. After receiving the Bulk Erase Program Memory command the erase will not complete until the time interval has expired. ERAB Note: The code protection Configuration bit (CP) has no effect on the Bulk Erase Program Memory command ...

Page 20

... ERAR TABLE 4-2: PROGRAMMING ROW SIZE AND LATCHES Devices PIC16F1826/1827 PIC12F1822/16F1823 PIC16F1824/1825 PIC16F1828/1829 FIGURE 4-13: ROW ERASE PROGRAM MEMORY 1 ICSPCLK ICSPDAT 1 DS41390C-page 20 PC Row Size <15:5> 32 <15:4> 16 <15:5> 32 <15:5> ERAR Advance Information Number of Latches Next Command  2010 Microchip Technology Inc. ...

Page 21

... If more than the maximum number of data latches are written without a Begin Externally Timed Programming or Begin Internally Timed Programming command, the data in the data latches will be overwritten. The following figures show the recommended flowcharts for programming.  2010 Microchip Technology Inc. Advance Information DS41390C-page 21 ...

Page 22

... Enter Programming Mode Bulk Erase Device Write Program (1) Memory Write User IDs Write Data (3) Memory Verify Program Memory Verify User IDs Verify Data Memory Write Configuration (2) Words Verify Configuration Words Exit Programming Mode Done Advance Information  2010 Microchip Technology Inc. ...

Page 23

... Note 1: This step is optional if device has already been erased or has not been previously programmed the device is code-protected or must be completely erased, then Bulk Erase device per Figure 5-8. 3: See Figure 5-3 or Figure 5-4.  2010 Microchip Technology Inc. Start Bulk Erase Program ...

Page 24

... PIC16F/LF182X/PIC12F/LF1822 FIGURE 5-3: ONE-WORD PROGRAM CYCLE (Internally timed) DS41390C-page 24 Program Cycle Load Data for Program Memory Begin Begin Programming Programming Command Command (Externally timed) Wait T Wait T PEXT PINT End Programming Command Wait T DIS Advance Information  2010 Microchip Technology Inc. ...

Page 25

... PIC16F/LF182X/PIC12F/LF1822 FIGURE 5-4: MULTIPLE-WORD PROGRAM CYCLE  2010 Microchip Technology Inc. Program Cycle Load Data Latch 1 for Program Memory Increment Address Command Load Data Latch 2 for Program Memory Increment Address Command Load Data Latch n for Program Memory Begin Begin Programming Programming ...

Page 26

... Word 1) Read Data From Program Memory Command Report No Data Correct? Programming Failure Yes Increment Address Command One-word (2) Program Cycle (Config. Word 2) Read Data From Program Data Correct? Memory Command Advance Information Report No Programming Failure Yes Done  2010 Microchip Technology Inc. ...

Page 27

... PIC16F/LF182X/PIC12F/LF1822 FIGURE 5-6: DATA MEMORY PROGRAM FLOWCHART Increment Address Command Note 1: See Figure 5-7.  2010 Microchip Technology Inc. Start Bulk Erase Data Memory Data (1) Program Cycle Read Data From Data Memory Command Report No Programming Data Correct? Failure Yes No All Locations ...

Page 28

... Data Memory Begin Begin Programming Programming Command Command (Internally timed) (Externally timed) Wait T Wait T PINT PEXT End Programming Command Wait T DIS Start Load Configuration Bulk Erase Program Memory Bulk Erase Data Memory Done Advance Information  2010 Microchip Technology Inc. ...

Page 29

... Bulk Erase Program Memory command. Note: To ensure system security, if CPD bit = 0, the Bulk Erase Program Memory command will also erase data memory.  2010 Microchip Technology Inc. 7.0 HEX FILE USAGE In the hex file there are two bytes per program word ® ...

Page 30

... PIC16F1827 3FFFh PIC16LF1826 3FFFh PIC16LF1827 3FFFh PIC12F1822 3FFFh PIC12LF1822 3FFFh PIC16F1823 3FFFh PIC16LF1823 3FFFh PIC16F1824 3FFFh PIC16LF1824 3FFFh PIC16F1825 3FFFh PIC16LF1825 3FFFh PIC16F1828 3FFFh PIC16LF1828 3FFFh PIC16F1829 3FFFh PIC16LF1829 3FFFh EXAMPLE 7-1: CHECKSUM COMPUTED WITH PROGRAM CODE PROTECTION DISABLED PIC16F1827, BLANK DEVICE ...

Page 31

... User ID (8000h) User ID (8001h) User ID (8002h) User ID (8003h) Sum of User IDs Checksum  2010 Microchip Technology Inc. location 8000h is the Most Significant nibble. This Sum of User IDs is summed with the Configuration Words (all unimplemented Configuration bits are masked to ‘0’). Note: Data checksum ...

Page 32

... A Max. Units Conditions/Comments 5.5 V 3.6 V 5.5 V 3.6 V 1.0 mA 3.0 mA A 600 9.0 V s 1.0 — 3.5 mA — — ns s — — ns — ns — ns — s — 2.5 ms  2010 Microchip Technology Inc. ...

Page 33

... ICSPCLK FIGURE 8-2: PROGRAMMING MODE ENTRY – ENTS ENTH V IHH ICSPDAT ICSPCLK  2010 Microchip Technology Inc. Standard Operating Conditions (unless otherwise stated) Operating Temperature Min. Typ. — — — — — — 1.0 — 100 — 1 — FIGURE 8-3: FIRST ...

Page 34

... DS DH ICSPDAT as input T CO ICSPDAT as output T LZD ICSPDAT from input T HZD to output ICSPDAT from output to input FIGURE 8-6: WRITE COMMAND-PAYLOAD TIMING 1 2 ICSPCLK X X ICSPDAT DS41390C-page 34 T DLY LSb Command Advance Information MSb 0 Next Payload Command  2010 Microchip Technology Inc. ...

Page 35

... FIGURE 8-7: READ COMMAND-PAYLOAD TIMING 1 2 ICSPCLK X X ICSPDAT (from Programmer) ICSPDAT (from Device) FIGURE 8-8: LVP ENTRY (POWERING UP MCLR T ENTS T ENTH T CKH ICSPCLK LSb of Pattern ICSPDAT 0  2010 Microchip Technology Inc. T DLY Command 33 clocks T CKL MSb of Pattern 1 2 ... 31 Advance Information ...

Page 36

... PIC16F/LF182X/PIC12F/LF1822 FIGURE 8-9: LVP ENTRY (POWERED MCLR T ENTH T CKH ICSPCLK LSb of Pattern ICSPDAT 0 Note 1: Sequence matching can start with no edge on MCLR first. DS41390C-page 36 33 Clocks T CKL MSb of Pattern 1 2 ... 31 Advance Information  2010 Microchip Technology Inc. ...

Page 37

... REVISION HISTORY Revision A (06/2009) Original release of this document. Revision B (10/2009) Added PIC12F/LF1822 and PIC16F/LF1823 devices. Revision C (03/2010) Added PIC12F/LF1824, PIC16F/LF1825, LF1828 and PIC16F/LF1829 devices; Added Figure 2-8, Figure 2-9 and Figure 3-3.  2010 Microchip Technology Inc. PIC16F/ Advance Information DS41390C-page 37 ...

Page 38

... PIC16F/LF182X/PIC12F/LF1822 NOTES: DS41390C-page 38 Advance Information  2010 Microchip Technology Inc. ...

Page 39

... PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 40

... France - Paris Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 Germany - Munich Tel: 49-89-627-144-0 Fax: 49-89-627-144-44 Italy - Milan Tel: 39-0331-742611 Fax: 39-0331-466781 Netherlands - Drunen Tel: 31-416-690399 Fax: 31-416-690340 Spain - Madrid Tel: 34-91-708-08-90 Fax: 34-91-708-08- Wokingham Tel: 44-118-921-5869 Fax: 44-118-921-5820 01/05/10  2010 Microchip Technology Inc. ...

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