PIC16LF1824-I/SL Microchip Technology, PIC16LF1824-I/SL Datasheet - Page 10

• Manufacturer Part Number: PIC16LF1824-I/SL
• Description: IC PIC MCU 8BIT 14KB FLSH 14SOIC
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16LF1824-I/SL

• Core Size: 8-Bit
• Program Memory Size: 7KB (4K x 14)
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 11
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 14-SOIC (0.154", 3.90mm Width)
• Controller Family/series: PIC16LF
• No. Of I/o's: 12
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 256Byte
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Processor Series: PIC16LF
• Core: PIC
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC16F/LF182X/PIC12F/LF1822
REGISTER 3-2:
DS41390C-page 10
bit 13
bit 6
Legend:
R = Readable bit
-n = Value at POR
bit 13
bit 12
bit 11
bit 10-9
bit 8
bit 7
bit 6
bit 5
bit 4-3
bit 2-0
Note
FCMEN
MCLRE
R/P-1
R/P-1
1:
2:
3:
Enabling Brown-out Reset does not automatically enable Power-up Timer.
The entire data EEPROM will be erased when the code protection is turned off during an erase.
The entire program memory will be erased when the code protection is turned off.
FCMEN: Fail-Safe Clock Monitor Enable bit
1 = Fail-Safe Clock Monitor is enabled
0 = Fail-Safe Clock Monitor is disabled
IESO: Internal External Switchover bit
1 = Internal/External Switchover mode is enabled
0 = Internal/External Switchover mode is disabled
CLKOUTEN: Clock Out Enable bit
1 = CLKOUT function is disabled. I/O or oscillator function on CLKOUT pin.
0 = CLKOUT function is enabled on CLKOUT pin
BOREN<1:0>: Brown-out Reset Enable bits
11 = BOR enabled
10 = BOR enabled during operation and disabled in Sleep
01 = BOR controlled by SBOREN bit of the PCON register
00 = BOR disabled
CPD: Data Code Protection bit
1 = Data memory code protection is disabled
0 = Data memory code protection is enabled
CP: Code Protection bit
1 = Program memory code protection is disabled
0 = Program memory code protection is enabled
MCLRE: MCLR/V
If LVP bit = 1:
If LVP bit = 0:
PWRTE: Power-up Timer Enable bit
1 = PWRT disabled
0 = PWRT enabled
WDTE<1:0>: Watchdog Timer Enable bit
11 = WDT enabled
10 = WDT enabled while running and disabled in Sleep
01 = WDT controlled by the SWDTEN bit in the WDTCON register
00 = WDT disabled
FOSC<2:0>: Oscillator Selection bits
111 = ECH: External Clock, High-Power mode: on CLKIN pin
110 = ECM: External Clock, Medium-Power mode: on CLKIN pin
101 = ECL: External Clock, Low-Power mode: on CLKIN pin
100 = INTOSC oscillator: I/O function on OSC1 pin
011 = EXTRC oscillator: RC function on OSC1 pin
010 = HS oscillator: High-speed crystal/resonator on OSC2 pin and OSC1 pin
001 = XT oscillator: Crystal/resonator on OSC2 pin and OSC1 pin
000 = LP oscillator: Low-power crystal on OSC2 pin and OSC1 pin
This bit is ignored.
1 = MCLR/V
0 = MCLR/V
PWRTE
CONFIGURATION WORD 1
R/P-1
R/P-1
IESO
PP
PP
PP
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
pin function is MCLR; Weak pull-up enabled.
pin function is digital input; MCLR internally disabled; Weak pull-up under control of WPUA register.
Pin Function Select bit
CLKOUTEN
(3)
WDTE1
R/P-1
R/P-1
(2)
Advance Information
(1)
(1)
BOREN1
WDTE0
R/P-1
R/P-1
BOREN0
FOSC2
R/P-1
R/P-1
P = Programmable Bit
‘0’ = Bit is cleared
x = Bit is unknown
 2010 Microchip Technology Inc.
FOSC1
R/P-1
R/P-1
CPD
FOSC0
R/P-1
R/P-1
CP
bit 7
bit 0