XC3S250E-4TQ144I Xilinx Inc, XC3S250E-4TQ144I Datasheet - Page 182

• Manufacturer Part Number: XC3S250E-4TQ144I
• Description: IC FPGA SPARTAN 3E 144TQFP
• Manufacturer: Xilinx Inc
• Series: Spartan™-3Er

Specifications of XC3S250E-4TQ144I

• Number Of Logic Elements/cells: 5508
• Number Of Labs/clbs: 612
• Total Ram Bits: 221184
• Number Of I /o: 108
• Number Of Gates: 250000
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Pinout Descriptions
Table 137: TQ144 Package Pinout (Continued)
182
Bank
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
IO_L08P_2/M0
IO_L09N_2/VS1/A18
IO_L09P_2/VS2/A19
IO_L10N_2/CCLK
IO_L10P_2/VS0/A17
IP
IP
IP
IP_L03N_2/VREF_2
IP_L03P_2
IP_L06N_2/M2/GCLK1
IP_L06P_2/RDWR_B/GCLK0
VCCO_2
VCCO_2
VCCO_2
IP/VREF_3
IO_L01N_3
IO_L01P_3
IO_L02N_3/VREF_3
IO_L02P_3
IO_L03N_3
IO_L03P_3
IO_L04N_3/LHCLK1
IO_L04P_3/LHCLK0
IO_L05N_3/LHCLK3/IRDY2
IO_L05P_3/LHCLK2
IO_L06N_3/LHCLK5
IO_L06P_3/LHCLK4/TRDY2
IO_L07N_3/LHCLK7
IO_L07P_3/LHCLK6
IO_L08N_3
IO_L08P_3
IO_L09N_3
IO_L09P_3
IO_L10N_3
IO_L10P_3
IP
IO
IP
IP
XC3S100E Pin Name
IO_L08P_2/M0
IO_L09N_2/VS1/A18
IO_L09P_2/VS2/A19
IO_L10N_2/CCLK
IO_L10P_2/VS0/A17
IP
IP
IP
IP_L03N_2/VREF_2
IP_L03P_2
IP_L06N_2/M2/GCLK1
IP_L06P_2/RDWR_B/GCLK0
VCCO_2
VCCO_2
VCCO_2
IO/VREF_3
IO_L01N_3
IO_L01P_3
IO_L02N_3/VREF_3
IO_L02P_3
IO_L03N_3
IO_L03P_3
IO_L04N_3/LHCLK1
IO_L04P_3/LHCLK0
IO_L05N_3/LHCLK3
IO_L05P_3/LHCLK2
IO_L06N_3/LHCLK5
IO_L06P_3/LHCLK4
IO_L07N_3/LHCLK7
IO_L07P_3/LHCLK6
IO_L08N_3
IO_L08P_3
IO_L09N_3
IO_L09P_3
IO_L10N_3
IO_L10P_3
IP
IP
IP
IP
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XC3S250E Pin Name
TQ144 Pin
P62
P68
P67
P71
P70
P38
P41
P69
P48
P47
P57
P56
P42
P49
P64
P31
P15
P14
P17
P16
P21
P20
P23
P22
P26
P25
P33
P32
P35
P34
P10
P18
P24
P3
P2
P5
P4
P8
P7
P6
DS312-4 (v3.8) August 26, 2009
Product Specification
100E: VREF(INPUT)
250E: VREF(I/O)
250E: INPUT
DUAL/GCLK
DUAL/GCLK
100E: I/O
LHCLK
LHCLK
LHCLK
LHCLK
LHCLK
LHCLK
LHCLK
LHCLK
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
VCCO
VCCO
VCCO
VREF
VREF
DUAL
DUAL
DUAL
DUAL
DUAL
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
R