AT89LP52-20AU Atmel, AT89LP52-20AU Datasheet - Page 27

IC MCU 8051 8K FLASH SPI 44TQFP

AT89LP52-20AU

Manufacturer Part Number
AT89LP52-20AU
Description
IC MCU 8051 8K FLASH SPI 44TQFP
Manufacturer
Atmel
Series
89LPr
Datasheet

Specifications of AT89LP52-20AU

Core Processor
8051
Core Size
8-Bit
Speed
20MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP
Processor Series
AT89x
Core
8051
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
Serial
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
36
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

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Manufacturer:
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Table 5-3.
3709B–MICRO–12/10
Symbol
DPU1
DPU0
DPD1
DPD0
SIGEN
DPS
AUXR1 = A2H
Not Bit Addressable
Bit
Function
Data Pointer 1 Update. When set, MOVX @DPTR and MOVC @DPTR instructions that use DPTR1 will also update
DPTR1 based on DPD1. If DPD1 = 0 the operation is post-increment and if DPD1 = 1 the operation is post-decrement.
When DPU1 = 0, DPTR1 is not updated.
Data Pointer 0 Update. When set, MOVX @DPTR and MOVC @DPTR instructions that use DPTR0 will also update
DPTR0 based on DPD0. If DPD0 = 0 the operation is post-increment and if DPD0 = 1 the operation is post-decrement.
When DPU0 = 0, DPTR0 is not updated.
Data Pointer 1 Decrement. When set, INC DPTR instructions targeted to DPTR1 will decrement DPTR1. When cleared,
INC DPTR instructions will increment DPTR1. DPD1 also determines the direction of auto-update for DPTR1 when
DPU1 = 1.
Data Pointer 0 Decrement. When set, INC DPTR instructions targeted to DPTR0 will decrement DPTR0. When cleared,
INC DPTR instructions will increment DPTR0. DPD0 also determines the direction of auto-update for DPTR0 when
DPU0 = 1.
Signature Enable. When SIGEN = 1 all MOVC @DPTR instructions and all IAP accesses will target the signature array
memory. When SIGEN = 0, all MOVC and IAP accesses target CODE memory.
Data Pointer Select. DPS selects the active data pointer for instructions that reference DPTR. When DPS = 0, DPTR will
target DPTR0 and /DPTR will target DPTR1. When DPS = 1, DPTR will target DPTR1 and /DPTR will target DPTR0.
AUXR1
DPU1
7
– Data Pointer Configuration Register
Table 5-2.
The data pointer update bits, DPU1 and DPU0, allow MOVX @DPTR and MOVC @DPTR
instructions to update the selected data pointer automatically in a post-increment or post-decre-
ment fashion. The direction of update depends on the DPD1 and DPD0 bits as shown in
5-4. These bits can be used to make block copy routines more efficient.
Table 5-4.
DPU0
DPD1
DPD1
0
0
1
1
0
0
1
1
6
DPD0
DPD0
Data Pointer Decrement Behavior
Data Pointer Auto-Update
0
1
0
1
0
1
0
1
DPD1
5
DEC DPTR0
DEC DPTR0
INC DPTR0
INC DPTR0
INC DPTR
DPTR0++
DPTR0++
DPTR0--
DPTR0--
DPTR
DPD0
Update Operation for MOVX and MOVC (DPU1 = 1 & DPU0 = 1)
4
Equivalent Operation for INC DPTR and INC /DPTR
DPS = 0
DPS = 0
SIGEN
DEC DPTR1
DEC DPTR1
INC DPTR1
INC DPTR1
INC /DPTR
3
DPTR1++
DPTR1++
DPTR1--
DPTR1--
AT89LP51/52 - Preliminary
/DPTR
0
2
DEC DPTR1
DEC DPTR1
INC DPTR1
INC DPTR1
INC DPTR
DPTR1++
DPTR1++
DPTR1--
DPTR1--
DPTR
Reset Value = 0000 00X0B
1
DPS = 1
DPS = 1
DEC DPTR0
DEC DPTR0
INC DPTR0
INC DPTR0
INC /DPTR
DPTR0++
DPTR0++
DPTR0--
DPTR0--
DPS
/DPTR
0
Table
27

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