PK30N512VLQ100 Freescale Semiconductor, PK30N512VLQ100 Datasheet - Page 54

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PK30N512VLQ100

Manufacturer Part Number
PK30N512VLQ100
Description
IC ARM CORTEX MCU 512K 144-LQFP
Manufacturer
Freescale Semiconductor
Series
Kinetisr
Datasheet

Specifications of PK30N512VLQ100

Core Processor
ARM Cortex-M4
Core Size
32-Bit
Speed
100MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SDHC, SPI, UART/USART
Peripherals
DMA, I²S, LCD, LVD, POR, PWM, WDT
Number Of I /o
102
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.71 V ~ 3.6 V
Data Converters
A/D 37x16b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Part Number
Manufacturer
Quantity
Price
Part Number:
PK30N512VLQ100
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Peripheral operating requirements and behaviors
6.8.3 DSPI switching specifications (high-speed mode)
The DMA Serial Peripheral Interface (DSPI) provides a synchronous serial bus with
master and slave operations. Many of the transfer attributes are programmable. The tables
below provide DSPI timing characteristics for classic SPI timing modes. Refer to the
DSPI chapter of the Reference Manual for information on the modified transfer formats
used for communicating with slower peripheral devices.
54
DS10
DS11
DS12
DS13
DS14
DS15
DS16
Num
Num
DS9
DSPI_SS
DSPI_SCK
(CPOL=0)
DSPI_SOUT
DSPI_SIN
Operating voltage
Frequency of operation
DSPI_SCK input cycle time
DSPI_SCK input high/low time
DSPI_SCK to DSPI_SOUT valid
DSPI_SCK to DSPI_SOUT invalid
DSPI_SIN to DSPI_SCK input setup
DSPI_SCK to DSIP_SIN input hold
DSPI_SS active to DSPI_SOUT driven
DSPI_SS inactive to DSPI_SOUT not driven
Operating voltage
Frequency of operation
Table 37. Master mode DSPI timing (high-speed mode)
Table 36. Slave mode DSPI timing (low-speed mode)
Figure 23. DSPI classic SPI timing — slave mode
K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
DS13
DS15
Description
Description
Table continues on the next page...
First data
First data
DS14
Preliminary
DS10
DS12
Data
Data
(t
DS11
8 x t
SCK
1.71
Min.
Min.
2.7
15
DS9
0
5
/2) - 4
BCLK
Last data
Last data
Freescale Semiconductor, Inc.
DS16
(t
SCK/2)
Max.
Max.
6.25
3.6
3.6
20
15
15
25
+ 4
MHz
MHz
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
V
V

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