DS90UR908QSQE/NOPB National Semiconductor, DS90UR908QSQE/NOPB Datasheet - Page 4

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DS90UR908QSQE/NOPB

Manufacturer Part Number
DS90UR908QSQE/NOPB
Description
IC DESERIALIZER 65MHZ 48LLP
Manufacturer
National Semiconductor
Datasheet

Specifications of DS90UR908QSQE/NOPB

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
DS90UR908QSQE/NOPBTR

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Pin Name
Optional Serial Bus Control Interface
SCL
SDA
ID[x]
Power and Ground
VDDL
VDDA
VDDP
VDDSC
VDDTX
V
GND
DAP
DDIO
NOTE: 1 = HIGH, 0 = LOW
Pin #
5
4
12
6, 31
38, 43
8
46, 47
13
25
9, 14, 26,
32, 39, 44,
45, 48
DAP
I/O, Type
I, LVCMOS
I/O,
LVCMOS
Open Drain
I, Analog
Power
Power
Power
Power
Power
Power
Ground
Ground
Description
Serial Control Bus Clock Input - Optional
SCL requires an external pull-up resistor to V
Serial Control Bus Data Input / Output - Optional
SDA requires an external pull-up resistor to V
Serial Control Bus Device ID Address Select — Optional
Resistor to Ground and 10 kΩ pull-up to 1.8V rail. See
Logic Power, 1.8 V ±5%
Analog Power, 1.8 V ±5%
PLL Power, 1.8 V ±5%
SSC Generator Power, 1.8 V ±5%
FPD-Link Power, 3.3 V ±10%
LVCMOS I/O Power, 1.8 V ±5% OR 3.3 V ±10%
Ground
DAP is the large metal contact at the bottom side, located at the center of the LLP package.
Connect to the ground plane (GND) with at least 9 vias.
4
DDIO
DDIO
.
.
Table
7.

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