DS90UB901QSQE/NOPB National Semiconductor, DS90UB901QSQE/NOPB Datasheet - Page 36
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DS90UB901QSQE/NOPB
Manufacturer Part Number
DS90UB901QSQE/NOPB
Description
IC SER/DESER 10-43MHZ 16B 32-LLP
Manufacturer
National Semiconductor
Datasheet
1.DS90UB902QSQXNOPB.pdf
(44 pages)
Specifications of DS90UB901QSQE/NOPB
Function
Serializer
Data Rate
688Mbps
Input Type
LVCMOS
Output Type
CML
Number Of Inputs
1
Number Of Outputs
1
Voltage - Supply
1.71 V ~ 1.89 V, 3 V ~ 3.6 V
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
32-WFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
DS90UB901QSQE/NOPBTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Step 3: Stop at SPEED BIST by turning off BIST mode in the
Deserializer to determine Pass/Fail.
To end BIST, the system must pull BISTEN pin of the Dese-
rializer LOW. The BIST duration is fully defined by the BIS-
For instance, if BISTEN is held HIGH for 1 second and the
PCLK is running at 43 MHz with 16 bpp, then the Bit Error
Rate is no better than 1.46E-9.
Step 4: Place system in Normal Operating Mode by disabling
BIST at the Serializer.
Once Step 3 is complete, AT SPEED BIST is over and the
Deserializer is out of BIST mode. To fully return to Normal
mode, apply Normal input data into the Serializer.
Any PASS result will remain unless it is changed by a new
BIST session or cleared by asserting and releasing PDB. The
default state of PASS after a PDB toggle is HIGH.
It is important to note that AT SPEED BIST will only determine
if there is an issue on the link that is not related to the clock
and data recovery of the link (whose status is flagged with
LOCK pin).
FIGURE 34. BIST BER Calculation
FIGURE 33. BIST Timing Diagram
36
TEN width and Deserializer LOCK is HIGH; thus the Bit Error
Rate is determined by how long the system holds BISTEN
HIGH.
LVCMOS VDDIO OPTION
1.8V or 3.3V SER Inputs and DES Outputs are user seletable
to provide compatibility with 1.8V and 3.3V system interfaces.
REMOTE WAKE UP (Camera Mode)
After initial power up, the Serializer is in a low-power Standby
mode. The Deserializer (controlled by ECU/MCU) 'Remote
Wake-up' register allows the Deserializer side to generate a
signal across the link to remotely wake-up the Serializer.
Once the Serializer detects the wake-up signal Serializer
switches from Standby mode to active mode. In active mode,
the Serializer locks onto PCLK input (if present), otherwise
the on-chip oscillator is used as the input clock source. Note
the MCU controller should monitor the Deserializer LOCK pin
and confirm LOCK = H before performing any I
cation across the link.
For Remote Wake-up to function properly:
30113505
2
C communi-
30113564