NCN8024DWR2G ON Semiconductor, NCN8024DWR2G Datasheet - Page 13

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NCN8024DWR2G

Manufacturer Part Number
NCN8024DWR2G
Description
IC SMART CARD IC2 8SOIC
Manufacturer
ON Semiconductor
Datasheet

Specifications of NCN8024DWR2G

Applications
Smart Card Reader, Writer
Voltage - Supply
5V
Package / Case
28-SOIC (0.300", 7.50mm Width)
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Interface
-

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POWER−DOWN
NCN8024 runs a deactivation sequence by setting High
CMDVCC. The below power down sequence is executed:
FAULT DETECTION
card, the NCN8024 provides security features to prevent
failures or damages as depicted here after.
Interrupt Pin Management:
Low.
High position. INT is Low if no card is present in the card
connector (Normally open or normally closed type). INT is
High if a card is present. If a card is inserted (INT = High)
and if V
drops Low immediately. It turns back High when V
increases again over the UVLO limit (including hysteresis),
a card being still present.
When the communication session is completed the
In order to protect both the interface and the external smart
A card session is opened by toggling CMDVCC High to
Before a card session, CMDVCC is supposed to be in a
CRD_RST is forced to Low
Card extraction detection
V
Short−circuit or overload on CRD_V
DD
CRD_PRES
CRD_VCC
under voltage detection
CMDVCC
DD
drops below the UVLO threshold then INT pin
CRD_VCC
CRD_RST
CRD_CLK
CMDVCC
INT
CRD_IO
Debounce
Figure 7. Fault Detection and Interrupt Management
Powerdown Resulting of
CC
Card Extraction
Figure 6. Deactivation Sequence
http://onsemi.com
DD
13
t
deact
goes Low when a fault is detected. In that case a deactivation
is immediately and automatically performed (see Figure 6).
When the microcontroller resets CMDVCC to High it can
sense the INT level again after having got completed the
deactivation.
of 8 ms typical duration. When a card is inserted, output INT
goes High only at the end of the debounce time. When the
card is removed a deactivation sequence is automatically
and immediately performed and INT goes Low.
During a card session, CMDVCC is Low and INT pin
As illustrated by Figure 7 the device has a debounce timer
CRD_CLK is set Low 12 ms after CRD_RST.
CRD_IO, CRD_AUX1 and CRD_AUX2 are pulled Low
Finally CRD_V
Card pin current limitation: in the case of a short circuit
to ground. No feedback is provided to the external MPU.
DC/DC operation: the internal circuit continuously
senses the CRD_V
or under voltage situation).
DC/DC operation: under−voltage detection on V
overload on VUP
Overheating
Powerdown Caused by
Debounce
CC
CC
supply can be shut−off.
Short−Circuit
voltage (in the case of either over
DDP
or

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