CS-E9302 Olimex Ltd., CS-E9302 Datasheet - Page 16

• Manufacturer Part Number: CS-E9302
• Description: MCU, MPU & DSP Development Tools DEV BRD FOR EP9301/ EP9302 ARM920T
• Manufacturer: Olimex Ltd.

Specifications of CS-E9302

• Processor To Be Evaluated: EP9302 ARM920T
• Interface Type: RS-232, Ethernet, USB, I2S, JTAG, SPI, UART
• Dimensions: 110 mm x 90 mm
• Operating Supply Voltage: 5 V
• Silicon Manufacturer: Cirrus
• Core Architecture: ARM
• Core Sub-architecture: ARM9
• Silicon Core Number: EP9
• Kit Contents: Board
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 1776317 52R3485

JTAG:
Action Group) port directly to the core. Instructions may be inserted and executed by the
core thus allowing MCU memory to be programmed with code and executed step by step by
the host software.
TDI
TDO
shifted out of the
TMS
machine.
TCK
a positive edge
internal state of the device.
TRST Input Test Reset. This signal resets the JTAG controller.
TCK
acknowledge it is
RSTN Input Reset. This signal resets the MCU.
PWR:
1
2
Pin # Signal Name
Pin # Signal Name Pin # Signal Name
1
3
5
7
9
11
13
15
17
19
The JTAG connector allows the software debugger to talk via a JTAG (Joint Test
For more details refer to IEEE Standard 1149.1 - 1990 Standard Test Access Port.
Input Test Data In. This is the serial data input for the shift register.
OutputTest Data Out. This is the serial data output for the shift register. Data is
Input Test Mode Select. The TMS pin selects the next state in the TAP state
Input Test Clock. This allows shifting of the data in, on the TMS and TDI pins. It is
OutputClock. This is a synchronization signal which the JTAG connector uses to
+5VDC ONLY
GND
+3.3V
TRST
TDI
TMS
TCK
TCK/GND
TDO
RSTN/NC
NC
NC
This connector shares the ARM default JTAG layout.
2
4
6
8
10
12
14
16
18
20
device on the negative edge of the TCK signal.
triggered clock with the TMS and TCK signals that define the
ready to receive/transmit.
+3.3V
GND
GND
GND
GND
GND
GND
GND
GND
GND