WM8983GEFL/V Wolfson Microelectronics, WM8983GEFL/V Datasheet - Page 100

• Manufacturer Part Number: WM8983GEFL/V
• Description: Audio CODECs Mbl Multimedia CODEC w/ 1W Speaker Driver
• Manufacturer: Wolfson Microelectronics

Specifications of WM8983GEFL/V

• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: QFN-32
• Minimum Operating Temperature: - 25 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

WM8983
w
5 (05h)
6 (06h)
REGISTER
ADDRESS
4:3
2
1
0
8:6
5
4:3
2:1
0
8
7:5
BIT
FMT
DLRSWAP
ALRSWAP
MONO
WL8
DAC_COMP
ADC_COMP
LOOPBACK
CLKSEL
MCLKDIV
LABEL
10
0
0
0
000
0
00
00
0
1
010
DEFAULT
Audio interface Data Format Select:
00=Right Justified
01=Left Justified
10=I
11= DSP/PCM mode
Controls whether DAC data appears in ‘right’ or
‘left’ phases of LRC clock:
0=DAC data appear in ‘left’ phase of LRC
1=DAC data appears in ‘right’ phase of LRC
Controls whether ADC data appears in ‘right’ or
‘left’ phases of LRC clock:
0=ADC data appear in ‘left’ phase of LRC
1=ADC data appears in ‘right’ phase of LRC
Selects between stereo and mono device
operation:
0=Stereo device operation
1=Mono device operation. Data appears in ‘left’
phase of LRC
Reserved
Companding Control 8-bit mode
0=off
1=device operates in 8-bit mode
DAC companding
00=off (linear mode)
01=reserved
10=μ-law
11=A-law
ADC companding
00=off (linear mode)
01=reserved
10=μ-law
11=A-law
Digital loopback function
0=No loopback
1=Loopback enabled, ADC data output is fed
directly into DAC data input.
Controls the source of the clock for all internal
operation:
0=MCLK
1=PLL output
Sets the scaling for either the MCLK or PLL
clock output (under control of CLKSEL)
000=divide by 1
001=divide by 1.5
010=divide by 2
011=divide by 3
100=divide by 4
101=divide by 6
110=divide by 8
111=divide by 12
2
S format
DESCRIPTION
PD, Rev 4.3, May 2010
Digital Audio
Interfaces
Digital Audio
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Digital Audio
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Digital Audio
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Digital Audio
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Digital Audio
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Digital Audio
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Digital Audio
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Digital Audio
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Digital Audio
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Production Data
REFER TO
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