WM8983GEFL/V Wolfson Microelectronics, WM8983GEFL/V Datasheet - Page 96

• Manufacturer Part Number: WM8983GEFL/V
• Description: Audio CODECs Mbl Multimedia CODEC w/ 1W Speaker Driver
• Manufacturer: Wolfson Microelectronics

Specifications of WM8983GEFL/V

• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: QFN-32
• Minimum Operating Temperature: - 25 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

10
11
12
13
14
15
16
18
19
20
21
22
24
25
27
28
29
30
32
33
34
WM8983
REGISTER MAP
w
B[15:9]
0
1
2
3
4
5
6
7
8
9
D
E
C
ADDR
00
01
02
03
04
05
06
07
08
09
0A
0B
0
0
0E
0F
10
12
13
14
15
16
18
19
1B
1
1
1E
20
21
22
H
E
X
C
C
D
D
Software Reset
Power manage’t
1
Power manage’t
2
Power manage’t
3
Audio Interface
Companding ctrl
Clock Gen ctrl
Additional ctrl
GPIO Control
Jack detect
control
DAC Control
Left DAC digital
Vol
Right DAC dig’l
Vol
Jack Detect
Control
ADC Control
Left ADC Digital
Vol
Right ADC Digital
Vol
EQ1 – low shelf
EQ2 – peak 1
EQ3 – peak 2
EQ4 – peak 3
EQ5 – high shelf
DAC Limiter 1
DAC Limiter 2
Notch Filter 1
Notch Filter 2
Notch Filter 3
Notch Filter 4
ALC control 1
ALC control 2
ALC control 3
REGISTER
NAME
OUT4EN
CLKSEL
EQ2BW
EQ3BW
EQ4BW
BUFDC
DACVU
DACVU
ADCVU
ADCVU
ROUT1
HPFEN
LIMEN
MODE
MODE
OPEN
EQ3D
BCP
NFU
NFU
NFU
NFU
ALC
B8
EN
0
0
0
0
0
0
0
0
0
ALCSEL
OUT3EN
HPFAPP
LOUT1
MIXEN
NFEN
OUT4
LRP
B7
EN
0
0
0
0
0
0
0
0
0
0
0
0
0
0
MCLKDIV[2:0]
MIXEN
SLEEP
LOUT2
JD_EN
MUTE
OUT3
SOFT
B6
EN
0
0
0
0
ALCDCY[3:0]
ALCHLD[3:0]
JD_EN1[3:0]
LIMDCY[3:0]
EQ1C[1:0]
EQ2C[1:0]
EQ3C[1:0]
EQ4C[1:0]
EQ5C[1:0]
WL[1:0]
HPFCUT[2:0]
LIMLVL[2:0]
BOOST
ROUT2
PLLEN
ENR
WL8
B5
EN
OPCLKDIV[1:0]
0
0
JD_SEL[1:0]
Software reset
ALCMAX[2:0]
MICBEN
BOOST
ENL
DAC_COMP[1:0]
B4
DACLVOL[7:0]
DACRVOL[7:0]
ADCLVOL[7:0]
ADCRVOL[7:0]
0
0
0
FMT[1:0]
BCLKDIV[2:0]
NFA0[13:7]
NFA1[13:7]
NFA0[6:0]
NFA1[6:0]
RMIXEN
OSR128
OSR128
BIASEN
GPIO1P
INPGA
ENR
DAC
ADC
B3
OL
0
EQ1G[4:0]
EQ2G[4:0]
EQ3G[4:0]
EQ4G[4:0]
EQ5G[4:0]
INPPGA
LMIXEN
AMUTE
SR[2:0]
BUFIO
SWAP
ENL
DLR
ADC_COMP[1:0]
B2
EN
LIMBOOST[3:0]
0
0
ALCATK[3:0]
JD_EN0[3:0]
LIMATK[3:0]
ALCLVL[3:0]
GPIO1SEL[2:0]
ALCMIN[2:0]
SWAP
DACR
ADCR
ADC
ENR
DAC
ENR
POL
POL
ALR
B1
VMIDSEL[1:0]
0
0
PD, Rev 4.3, May 2010
SLOWC
Production Data
MONO
LOOP
BACK
DACL
LPOL
ADC
DAC
ADC
ENL
ENL
POL
B0
MS
EN
LK
0
DEF’T
(HEX)
VAL
12C
02C
02C
02C
02C
0FF
0FF
0FF
0FF
00B
000
000
000
050
000
140
000
000
000
000
000
100
032
000
000
000
000
000
038
032
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