WM8741GEDS/V Wolfson Microelectronics, WM8741GEDS/V Datasheet - Page 17

Audio D/A Converter ICs Stereo DAC, High End

WM8741GEDS/V

Manufacturer Part Number
WM8741GEDS/V
Description
Audio D/A Converter ICs Stereo DAC, High End
Manufacturer
Wolfson Microelectronics
Datasheet

Specifications of WM8741GEDS/V

Mounting Style
SMD/SMT
Package / Case
SSOP-28
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Production Data
Figure 8 DVDD Power up Sequence
Table 7 Digital POR Timing
w
Test Conditions
DVDD = 3.3V, DGND = 0V, T
PARAMETER
Power Supply Input Timing Information
DVDD level to POR rising
edge (DVDD rising)
DVDD level to POR falling
edge (DVDD falling)
In a real application the designer is unlikely to have control of the relative power up sequence of
AVDD and DVDD. The POR circuit ensures a reasonable delay between applying power to the
device and Device Ready.
Figure 7 and Figure 8 show typical power up scenarios in a real system. DVDD must be established
before the device can be written to. Any writes to the device before device ready will be ignored.
Note: DVDD must be established before the MCLK is started. This will ensure all synchronisation
circuitry within the device is fully initialised and ready.
AVDD must be established before the device will output any signal. Whilst the device will output
signal as soon as the Internal Analogue PORB indicates device ready, normal operation is not
possible until the VMID pin has reached the midrail voltage.
A
= +25
SYMBOL
V
V
por_hi
por_lo
o
C, T
A_max
= +125
Measured from DGND
Measured from DGND
TEST CONDITIONS
o
C, T
A_min
= -25
o
C, DVDD
max
= 3.6V, DVDD
MIN
1.86
1.83
TYP
min
= 3.0V
PD, Rev 4.2, October 2009
MAX
WM8741
UNIT
V
V
17

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