WM9712LGEFL/V Wolfson Microelectronics, WM9712LGEFL/V Datasheet - Page 57

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WM9712LGEFL/V

Manufacturer Part Number
WM9712LGEFL/V
Description
Multimedia Misc Stereo AC'97 CODEC T/P Interface
Manufacturer
Wolfson Microelectronics
Type
Audio and Touchpanel Codecr
Datasheet

Specifications of WM9712LGEFL/V

Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 25 C
Mounting Style
SMD/SMT
Package / Case
QFN
Audio Codec Type
Stereo
No. Of Adcs
3
No. Of Dacs
3
No. Of Input Channels
8
No. Of Output Channels
4
Adc / Dac Resolution
12bit
Adcs / Dacs Signal To Noise Ratio
94dB
Sampling Rate
48kHz
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
WM9712LGEFL/V
Manufacturer:
VISHAY
Quantity:
1 000
Production Data
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LOW POWER STANDBY MODE
If all the bits in registers 26h and 24h are set, then the WM9712L is in low-power standby mode and
consumes very little current. A 1MΩ resistor string remains connected across AVDD to generate
VREF. This is necessary if the on-chip analogue comparators are used (see “Battery Alarm and
Battery Measurement” section), and helps shorten the delay between wake-up and playback
readiness. If VREF is not required, the 1MΩ resistor string can be disabled by setting the SVD bit,
reducing current consumption further.
Table 43 Disabling VREF (for lowest possible power consumption)
SAVING POWER AT LOW SUPPLY VOLTAGES
The analogue supplies to the WM9712L can run from 1.8V to 3.6V. By default, all analogue circuitry
on the IC is optimized to run at 3.3V. This set-up is also good for all other supply voltages down to
1.8V. However, at lower voltages, it is possible to save power by reducing the internal bias currents
used in the analogue circuitry. This is controlled as shown below.
Table 44 Analogue Bias Selection
58h
5Ch
REGISTER
REGISTER
ADDRESS
ADDRESS
10
6:5
BIT
BIT
SVD
VBIAS
LABEL
LABEL
0
00
DEFAULT
DEFAULT
VREF Disable
0: VREF enabled using 1MΩ string (low-power
standby mode)
1 : VREF disabled, 1MΩ string disconnected
(OFF mode)
Analogue Bias optimization
11 : Lowest bias current, optimized for 1.8V
10 : Low bias current, optimized for 2.5V
01, 00 : Default bias current, optimized for 3.3V
DESCRIPTION
DESCRIPTION
PD Rev 4.5 August 2006
WM9712L
57

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