MAX5978ETJ+ Maxim Integrated Products, MAX5978ETJ+ Datasheet - Page 36

• Manufacturer Part Number: MAX5978ETJ+
• Description: Hot Swap & Power Distribution 0-16V HOTSWAP CONTLR W/10BIT CUR VOLT MON
• Manufacturer: Maxim Integrated Products

Specifications of MAX5978ETJ+

• Product: Controllers & Switches
• Supply Voltage (max): 16 V
• Supply Voltage (min): 0 V
• Power Dissipation: 2759 mW
• Operating Temperature Range: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Supply Current: 2.5 mA
• Package / Case: TQFN-32
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

0 to 16V, Hot-Swap Controller with 10-Bit
Current, Voltage Monitor, and 4 LED Drivers
Figure 8. Acknowledge
The acknowledge bit (ACK) is the 9th bit attached to any
8-bit data word. The receiving device always generates
an ACK. The device generates an ACK when receiving
an address or data by pulling SDA low during the 9th
clock period (see Figure 8). When transmitting data,
such as when the master device reads data back from
the device, the device waits for the master device to
generate an ACK. Monitoring ACK allows for detection
of unsuccessful data transfers. An unsuccessful data
transfer occurs if the receiving device is busy or if a sys-
tem fault has occurred. In the event of an unsuccessful
data transfer, the bus master should reattempt commu-
nication at a later time. The device generates a NACK
after the slave address during a software reboot or when
receiving an illegal memory address.
The send byte protocol allows the master device to send
1 byte of data to the slave device (see Figure 7). The
send byte presets a register pointer address for a sub-
sequent read or write. The slave sends a NACK instead
of an ACK if the master tries to send an address that is
not allowed. If the master sends a STOP condition, the
internal address pointer does not change. The send byte
procedure follows:
1) The master sends a START condition.
2) The master sends the 7-bit slave address and a write
36
bit (low).
TRANSMITTER
RECEIVER
SDA BY
SDA BY
SCL
CONDITION
START
S
1
Acknowledge
Send Byte
2
3) The addressed slave asserts an ACK on SDA.
4) The master sends an 8-bit data byte.
5) The addressed slave asserts an ACK on SDA.
6) The master sends a STOP condition.
The write byte/word protocol allows the master device
to write a single byte in the register bank or to write to a
series of sequential register addresses. The write byte
procedure follows:
1) The master sends a START condition.
2) The master sends the 7-bit slave address and a write
3) The addressed slave asserts an ACK on SDA.
4) The master sends an 8-bit command code.
5) The addressed slave asserts an ACK on SDA.
6) The master sends an 8-bit data byte.
7) The addressed slave asserts an ACK on SDA.
8) The addressed slave increments its internal address
9) The master sends a STOP condition or repeats steps
To write a single byte to the register bank, only the 8-bit
command code and a single 8-bit data byte are sent.
The data byte is written to the register bank if the com-
mand code is valid.
bit (low).
pointer.
6, 7, and 8.
CLOCK PULSE FOR ACKNOWLEDGE
8
9
Write Byte