LFE2-12E-5TN144C Lattice, LFE2-12E-5TN144C Datasheet - Page 103
![FPGA - Field Programmable Gate Array 12K LUTs 93 I/O DSP 1.2V -5 Spd](/photos/16/14/161499/landingpagelatticeecp2m_sml.jpg)
LFE2-12E-5TN144C
Manufacturer Part Number
LFE2-12E-5TN144C
Description
FPGA - Field Programmable Gate Array 12K LUTs 93 I/O DSP 1.2V -5 Spd
Manufacturer
Lattice
Datasheet
1.LFE2-12SE-6FN256C.pdf
(389 pages)
Specifications of LFE2-12E-5TN144C
Number Of Macrocells
12000
Number Of Programmable I/os
93
Data Ram Size
226304
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Package / Case
TQFP-144
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFE2-12E-5TN144C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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Lattice Semiconductor
Switching Test Conditions
Figure 3-22 shows the output test load that is used for AC testing. The specific values for resistance, capacitance,
voltage, and other test conditions are shown in Table 3-19.
Figure 3-22. Output Test Load, LVTTL and LVCMOS Standards
Table 3-19. Test Fixture Required Components, Non-Terminated Interfaces
LVTTL and other LVCMOS settings (L -> H, H -> L)
LVCMOS 2.5 I/O (Z -> H)
LVCMOS 2.5 I/O (Z -> L)
LVCMOS 2.5 I/O (H -> Z)
LVCMOS 2.5 I/O (L -> Z)
Note: Output test conditions for all other interfaces are determined by the respective standards.
Test Condition
*CL Includes Test Fixture and Probe Capacitance
DUT
V
R1
R2
T
1M
100
R
1
3-51
1M
100
R
CL*
2
Test Poi nt
0pF
C
DC and Switching Characteristics
LatticeECP2/M Family Data Sheet
L
LVCMOS 3.3 = 1.5V
LVCMOS 2.5 = V
LVCMOS 1.8 = V
LVCMOS 1.5 = V
LVCMOS 1.2 = V
V
V
V
V
OH
OL
CCIO
CCIO
+ 0.10
- 0.10
/2
/2
Timing Ref.
CCIO
CCIO
CCIO
CCIO
/2
/2
/2
/2
V
V
CCIO
CCIO
V
—
—
—
—
—
—
—
T
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