AGL400V5-FGG484 Actel, AGL400V5-FGG484 Datasheet - Page 70

FPGA - Field Programmable Gate Array 400K System Gates

AGL400V5-FGG484

Manufacturer Part Number
AGL400V5-FGG484
Description
FPGA - Field Programmable Gate Array 400K System Gates
Manufacturer
Actel
Datasheet

Specifications of AGL400V5-FGG484

Processor Series
AGL400
Core
IP Core
Number Of Logic Blocks
12
Maximum Operating Frequency
250 MHz
Number Of Programmable I/os
194
Data Ram Size
54 Kbit
Supply Voltage (max)
1.5 V
Supply Current
27 uA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
AGL-Icicle-Kit, AGL-Dev-Kit-SCS, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
1.425 V
Number Of Gates
400 K
Package / Case
FPBGA-484
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AGL400V5-FGG484
Manufacturer:
Actel
Quantity:
135
Part Number:
AGL400V5-FGG484
Manufacturer:
Microsemi SoC
Quantity:
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Part Number:
AGL400V5-FGG484I
Manufacturer:
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Quantity:
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IGLOO DC and Switching Characteristics
Table 2-78 • Minimum and Maximum DC Input and Output Levels
Table 2-79 • Minimum and Maximum DC Input and Output Levels
2- 56
2.5 V
LVCMOS
Drive
Strength
2 mA
4 mA
6 mA
8 mA
12 mA
16 mA
24 mA
Notes:
1. I
2. I
3. Currents are measured at 100°C junction temperature and maximum voltage.
4. Currents are measured at 85°C junction temperature.
5. Software default selection highlighted in gray.
2.5 V
LVCMOS
Drive
Strength
2 mA
4 mA
6 mA
8 mA
12 mA
Notes:
1. I
2. I
3. Currents are measured at 100°C junction temperature and maximum voltage.
4. Currents are measured at 85°C junction temperature.
5. Software default selection highlighted in gray.
larger when operating outside recommended ranges
larger when operating outside recommended ranges
IL
IH
IL
IH
is the input leakage current per I/O pin over recommended operation conditions where –0.3 V < VIN < VIL.
is the input leakage current per I/O pin over recommended operation conditions where –0.3 V < VIN < VIL.
is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI. Input current is
is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI. Input current is
2.5 V LVCMOS
Low-Voltage CMOS for 2.5 V is an extension of the LVCMOS standard (JESD8-5) used for general-
purpose 2.5 V applications. It uses a 5 V–tolerant input buffer and push-pull output buffer.
Min.
Min.
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
Applicable to Advanced I/O Banks
Applicable to Standard Plus I/O Banks
V
V
VIL
VIL
Max.
Max.
0.7
0.7
0.7
0.7
0.7
0.7
0.7
0.7
0.7
0.7
0.7
0.7
V
V
Min.
Min.
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
V
V
VIH
VIH
Max.
Max.
2.7
2.7
2.7
2.7
2.7
2.7
2.7
2.7
2.7
2.7
2.7
2.7
V
V
Max.
VOL
Max.
VOL
0.7
0.7
0.7
0.7
0.7
V
0.7
0.7
0.7
0.7
0.7
0.7
0.7
V
R ev i sio n 1 8
VOH
Min.
VOH
Min.
1.7
1.7
1.7
1.7
1.7
V
1.7
1.7
1.7
1.7
1.7
1.7
1.7
V
mA mA
I
mA mA
I
OL
12
12
16
24
2
6
OL
4
8
2
4
6
8
I
I
12
16
24
OH
OH
12
2
4
6
8
2
6
4
8
Max.
mA
I
Max.
169
mA
I
OSH
16
16
32
32
65
83
OSH
16
16
32
32
65
3
3
Max.
mA
I
Max.
mA
124
I
OSL
18
18
37
37
74
87
OSL
18
18
37
37
74
3
3
µA
µA
I
I
10
10
IL
10
10
10
10
10
10
10
IL
10
10
10
1
1
4
4
µA
µA
I
I
10
10
IH
IH
10
10
10
10
10
10
10
10
10
10
2
2
4
4

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