LFXP3C-3TN100I Lattice, LFXP3C-3TN100I Datasheet - Page 180
LFXP3C-3TN100I
Manufacturer Part Number
LFXP3C-3TN100I
Description
FPGA - Field Programmable Gate Array 3.1K LUTs 62 IO 1.8/ 2.5/3.3V -3 Spd I
Manufacturer
Lattice
Specifications of LFXP3C-3TN100I
Number Of Programmable I/os
62
Data Ram Size
55296
Supply Voltage (max)
3.465 V
Maximum Operating Temperature
+ 100 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.71 V
Package / Case
TQFP-100
Package
100TQFP
Family Name
LatticeXP
Device Logic Units
3000
Maximum Internal Frequency
320 MHz
Typical Operating Supply Voltage
1.8|2.5|3.3 V
Maximum Number Of User I/os
62
Ram Bits
55296
Re-programmability Support
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFXP3C-3TN100I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
- Current page: 180 of 397
- Download datasheet (10Mb)
Lattice Semiconductor
Table 9-6. True Dual Port RAM Attributes for LatticeECP/EC and LatticeXP
The True Dual Port RAM (RAM_DP_TRUE) can be configured as NORMAL, READ BEFORE WRITE or WRITE
THROUGH modes. Each of these modes affects what data comes out of the port Q of the memory during the write
operation followed by the read operation at the same memory location. The READ BEFORE WRITE attribute is
supported for x9 and x18 data widths. Detailed discussions of the WRITE modes and the constraints of the True
Dual Port can be found in Appendix A.
Additionally users can select to enable the output registers for RAM_DP_TRUE. Figures 8-15 through 8-20 show
the internal timing waveforms for the True Dual Port RAM (RAM_DP_TRUE) with these options.
DATA_WIDTH_A
DATA_WIDTH_B
REGMODE_A
REGMODE_B
RESETMODE
CSDECODE_A
CSDECODE_B
WRITEMODE_A
WRITEMODE_B
GSR
Attribute
Data Word Width Port A
Data Word Width Port B
Chip Select Decode for Port A
Chip Select Decode for Port B
Read / Write Mode for Port A
Read / Write Mode for Port B
Register Mode (Pipelining) for Port A
Register Mode (Pipelining) for Port B
Global Set Reset
Selects the Reset type
Description
9-15
1, 2, 4, 9, 18
1, 2, 4, 9, 18
NOREG, OUTREG
NOREG, OUTREG
ASYNC, SYNC
000, 001, 010, 011, 100, 101,
110, 111
000, 001, 010, 011, 100, 101,
110, 111
NORMAL, WRITETHROUGH,
READBEFOREWRITE
NORMAL, WRITETHROUGH,
READBEFOREWRITE
ENABLED, DISABLED
Values
LatticeECP/EC and LatticeXP Devices
ENABLED
NORMAL
NORMAL
Default
NOREG
NOREG
ASYNC
Value
Memory Usage Guide
000
000
1
1
User Selectable
IPexpress
Through
YES
YES
YES
YES
YES
YES
YES
YES
NO
NO
Related parts for LFXP3C-3TN100I
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs 136 IO 1.8 /2.5/3.3V -3 Spd I
Manufacturer:
Lattice
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs 62 IO 1.8/ 2.5/3.3V -3 Spd I
Manufacturer:
Lattice
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs 136 IO 1.8 /2.5/3.3V -3 Spd
Manufacturer:
Lattice
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs 100 I/O 1.8/2.5/3.3V -3 Spd
Manufacturer:
Lattice
Datasheet:
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTS 100 I/O
Manufacturer:
Lattice
Datasheet:
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTS 136 I/O
Manufacturer:
Lattice
Datasheet:
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs 100 I/O 1.8/2.5/3.3V -4 Spd
Manufacturer:
Lattice
Datasheet:
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTS 62 I/O
Manufacturer:
Lattice
Datasheet:
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs 62 I/O 1.8/2.5/3.3V -4 Spd
Manufacturer:
Lattice
Datasheet:
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTS 62 I/O
Manufacturer:
Lattice
Datasheet:
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs 100 I/O 1.8/2.5/3.3V IND
Manufacturer:
Lattice
Datasheet:
Part Number:
Description:
FPGA, 1.8V FLASH, INSTANT ON, SMD
Manufacturer:
LATTICE SEMICONDUCTOR
Datasheet:
Part Number:
Description:
FPGA LatticeXP Family 3000 Cells 320MHz 130nm (CMOS) Technology 1.8V/2.5V/3.3V 208-Pin PQFP Tray
Manufacturer:
LATTICE SEMICONDUCTOR
Datasheet:
Part Number:
Description:
FPGA LatticeXP Family 3000 Cells 320MHz 130nm (CMOS) Technology 1.8V/2.5V/3.3V 144-Pin TQFP Tray
Manufacturer:
LATTICE SEMICONDUCTOR
Datasheet:
Part Number:
Description:
FPGA LatticeXP Family 3000 Cells 360MHz 130nm (CMOS) Technology 1.8V/2.5V/3.3V 100-Pin TQFP Tray
Manufacturer:
LATTICE SEMICONDUCTOR
Datasheet: