AGLN020V5-QNG68 Actel, AGLN020V5-QNG68 Datasheet - Page 97

FPGA - Field Programmable Gate Array 20K System Gates IGLOO nano

AGLN020V5-QNG68

Manufacturer Part Number
AGLN020V5-QNG68
Description
FPGA - Field Programmable Gate Array 20K System Gates IGLOO nano
Manufacturer
Actel
Datasheet

Specifications of AGLN020V5-QNG68

Processor Series
AGLN020
Core
IP Core
Number Of Macrocells
172
Maximum Operating Frequency
250 MHz
Number Of Programmable I/os
49
Supply Voltage (max)
1.5 V
Supply Current
6 uA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
- 20 C
Development Tools By Supplier
AGLN-Nano-Kit, AGLN-Z-Nano-Kit, AGL-Dev-Kit-SCS, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FLASHPRO 4, FlashPro 3, FLASHPRO LITE
Mounting Style
SMD/SMT
Supply Voltage (min)
1.425 V
Number Of Gates
20 K
Package / Case
QFN-68
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AGLN020V5-QNG68
Manufacturer:
SILICON
Quantity:
4 500
Part Number:
AGLN020V5-QNG68
Manufacturer:
EVERSPIN
Quantity:
5 600
Figure 2-36 • FIFO FULL Flag and AFULL Flag Assertion
Figure 2-37 • FIFO EMPTY Flag and AEMPTY Flag Deassertion
Figure 2-38 • FIFO FULL Flag and AFULL Flag Deassertion
(Address Counter)
(Address Counter)
(Address Counter)
AEMPTY
WA/RA
EMPTY
WCLK
FULL
AFULL
WA/RA
WCLK
RCLK
RCLK
WA/RA
AFULL
WCLK
FULL
MATCH (FULL)
(EMPTY)
MATCH
1st Rising
NO MATCH
After 1st
Edge
Write
1st Rising
After 1st
Edge
Read
NO MATCH
NO MATCH
2nd Rising
t
NO MATCH
After 1st
CYC
Edge
Write
NO MATCH
1st Rising
After 2nd
Read
Edge
NO MATCH
t
RCKEF
R ev i si o n 1 1
t
WCKF
t
CKAF
NO MATCH
NO MATCH
Dist = AFF_TH
NO MATCH
IGLOO nano Low Power Flash FPGAs
NO MATCH
t
WCKFF
t
CKAF
MATCH (FULL)
t
Dist = AEF_TH + 1
CKAF
Dist = AFF_TH – 1
2- 83

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