LFXP10C-3FN256I Lattice, LFXP10C-3FN256I Datasheet - Page 170
LFXP10C-3FN256I
Manufacturer Part Number
LFXP10C-3FN256I
Description
FPGA - Field Programmable Gate Array 9.7K LUTs 188 IO 1.8 /2.5/3.3V -3 Spd I
Manufacturer
Lattice
Specifications of LFXP10C-3FN256I
Number Of Programmable I/os
188
Data Ram Size
221184
Supply Voltage (max)
3.465 V
Maximum Operating Temperature
+ 100 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.71 V
Package / Case
FPBGA-256
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFXP10C-3FN256I
Manufacturer:
LATTICE
Quantity:
201
Company:
Part Number:
LFXP10C-3FN256I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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Memory Usage Guide
Lattice Semiconductor
LatticeECP/EC and LatticeXP Devices
Figure 9-5. Example Generating Pseudo Dual Port RAM (RAM_DP) Using IPexpress
In the right-hand pane, options like Macro Type, Version, and Module_Name are device and selected module
dependent. These cannot be changed in IPexpress.
Users can change the directory where the generated module files will be placed by clicking the browse button in
the Project Path.
The File Name text box allows users to specify the entity and file name for the module they are about to generate.
Users must provide this name.
Design Entry, Verilog or VHDL, by default is the same as the project type. If the project is a VHDL project, the
selected Design Entry option will be “Schematic/ VHDL”, and “Schematic/ Verilog-HDL” if the project type is Verilog-
HDL.
Then click the Customize button. This opens another window where the RAM can be customized.
The the left-hand side of this window shows the block diagram of the module. The right-hand side includes the
Configuration tab.
9-5
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