AGLN250V2-ZVQG100 Actel, AGLN250V2-ZVQG100 Datasheet - Page 73
AGLN250V2-ZVQG100
Manufacturer Part Number
AGLN250V2-ZVQG100
Description
FPGA - Field Programmable Gate Array 250K System Gates IGLOO nano
Manufacturer
Actel
Datasheet
1.AGLN030V5-ZUCG81.pdf
(140 pages)
Specifications of AGLN250V2-ZVQG100
Processor Series
AGLN250
Core
IP Core
Number Of Macrocells
2048
Maximum Operating Frequency
250 MHz
Number Of Programmable I/os
68
Data Ram Size
36 Kbit
Supply Voltage (max)
1.5 V
Supply Current
34 uA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
- 20 C
Development Tools By Supplier
AGLN-Nano-Kit, AGLN-Z-Nano-Kit, AGL-Dev-Kit-SCS, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FLASHPRO 4, FlashPro 3, FLASHPRO LITE
Mounting Style
SMD/SMT
Supply Voltage (min)
1.2 V
Number Of Gates
250 K
Package / Case
VQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AGLN250V2-ZVQG100
Manufacturer:
Actel
Quantity:
90
Company:
Part Number:
AGLN250V2-ZVQG100
Manufacturer:
Microsemi SoC
Quantity:
10 000
Company:
Part Number:
AGLN250V2-ZVQG100I
Manufacturer:
Microsemi SoC
Quantity:
10 000
Table 2-85 • Combinatorial Cell Propagation Delays
Table 2-86 • Combinatorial Cell Propagation Delays
Combinatorial Cell
INV
AND2
NAND2
OR2
NOR2
XOR2
MAJ3
XOR3
MUX2
AND3
Note:
Combinatorial Cell
INV
AND2
NAND2
OR2
NOR2
XOR2
MAJ3
XOR3
MUX2
AND3
Note:
For specific junction temperature and voltage supply levels, refer to
For specific junction temperature and voltage supply levels, refer to
Timing Characteristics
1.5 V DC Core Voltage
1.2 V DC Core Voltage
Commercial-Case Conditions: T
Commercial-Case Conditions: T
Y = MAJ(A, B, C)
Y = MAJ(A, B, C)
Y = A
Y = A
Y = A !S + B S
Y = A !S + B S
Y = A · B · C
Y = A · B · C
J
J
Y = !(A + B)
Y = !(A + B)
Y = !(A · B)
Y = !(A · B)
Y = A
Y = A
Equation
Y = A + B
Equation
Y = A + B
Y = A · B
Y = A · B
= 70°C, Worst-Case VCC = 1.425 V
= 70°C, Worst-Case VCC = 1.14 V
Y = !A
Y = !A
⊕
⊕
⊕
⊕
B
B
R ev i si o n 1 1
⊕
⊕
B
B
C
C
Table 2-6 on page 2-6
Table 2-7 on page 2-7
Parameter
Parameter
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
PD
PD
PD
PD
PD
PD
PD
PD
PD
PD
PD
PD
PD
PD
PD
PD
PD
PD
PD
PD
IGLOO nano Low Power Flash FPGAs
for derating values.
for derating values.
0.76
0.87
0.91
0.90
0.94
1.39
1.44
1.60
1.17
1.18
1.33
1.48
1.58
1.53
1.63
2.34
2.59
2.74
2.03
Std.
Std.
2.11
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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