A54SX32A-PQG208 Actel, A54SX32A-PQG208 Datasheet - Page 29
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A54SX32A-PQG208
Manufacturer Part Number
A54SX32A-PQG208
Description
FPGA - Field Programmable Gate Array 48K System Gates
Manufacturer
Actel
Datasheet
1.A54SX08A-TQG100.pdf
(108 pages)
Specifications of A54SX32A-PQG208
Processor Series
A54SX32
Core
IP Core
Number Of Macrocells
1800
Maximum Operating Frequency
350 MHz
Number Of Programmable I/os
249
Delay Time
4 ns to 8.4 ns
Supply Voltage (max)
5.25 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
Mounting Style
SMD/SMT
Supply Voltage (min)
2.25 V
Number Of Gates
32 K
Package / Case
PQFP-208
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
A54SX32A-PQG208
Manufacturer:
Actel
Quantity:
135
Company:
Part Number:
A54SX32A-PQG208
Manufacturer:
ACTEL
Quantity:
16
Company:
Part Number:
A54SX32A-PQG208
Manufacturer:
Microsemi SoC
Quantity:
10 000
Part Number:
A54SX32A-PQG208
Manufacturer:
ACTEL/爱特
Quantity:
20 000
Company:
Part Number:
A54SX32A-PQG208A
Manufacturer:
Microsemi SoC
Quantity:
10 000
Company:
Part Number:
A54SX32A-PQG208I
Manufacturer:
Microsemi SoC
Quantity:
10 000
Where:
Table 2-11 • CEQ Values for SX-A Devices
C
Combinatorial modules (C
Sequential modules (C
Input buffers (C
Output buffers (C
Routed array clocks (C
Dedicated array clocks – variable
(C
Dedicated array clocks – fixed (C
Routed array clock A (r
C
C
C
C
EQCM
C
EQSM
EQHV
EQCR
EQHV
EQHF
C
EQO
f
f
EQI
f
f
q
q
q1
q2
C
m = Number of logic modules switching at fm
f
f
s1
r
r
m
s
n = Number of input buffers switching at fn
p = Number of output buffers switching at fp
n
p
1
2
1
2
x = Number of I/Os at logic low
y = Number of I/Os at logic high
1 =
L =
)
= Equivalent capacitance of combinatorial modules
= Equivalent capacitance of sequential modules (R-Cells) in pF
= Equivalent capacitance of input buffers in pF
= Equivalent capacitance of output buffers in pF
= Equivalent capacitance of CLKA/B in pF
= Variable capacitance of HCLK in pF
= Fixed capacitance of HCLK in pF
= Average logic module switching rate in MHz
= Average input buffer switching rate in MHz
= Average output buffer switching rate in MHz
= Average CLKA rate in MHz
= Average CLKB rate in MHz
= Average HCLK rate in MHz
= Number of clock loads on CLKA
= Number of clock loads on CLKB
= Fixed capacitance due to CLKA
= Fixed capacitance due to CLKB
(C-cells) in pF
Output lead capacitance in pF
Number of clock loads on HCLK
EQI
EQO
)
)
EQCR
EQCM
1
)
EQCM
)
)
)
EQHF
)
A54SX08A
30.00 pF
35.00 pF
1.70 pF
1.50 pF
1.30 pF
7.40 pF
1.05 pF
0.85 pF
v5.3
A54SX16A
55.00 pF
50.00 pF
2.00 pF
1.50 pF
1.30 pF
7.40 pF
1.05 pF
0.85 pF
A54SX32A
110.00 pF
90.00 pF
2.00 pF
1.30 pF
1.30 pF
7.40 pF
1.05 pF
0.85 pF
SX-A Family FPGAs
A54SX72A
240.00 pF
310.00 pF
1.80 pF
1.50 pF
1.30 pF
7.40 pF
1.05 pF
0.85 pF
2-9