A3P400-FGG256 Actel, A3P400-FGG256 Datasheet - Page 41
![no-image](/images/manufacturer_photos/0/0/8/actel_sml.jpg)
A3P400-FGG256
Manufacturer Part Number
A3P400-FGG256
Description
FPGA - Field Programmable Gate Array 400K System Gates
Manufacturer
Actel
Datasheet
1.A3P1000-FGG144.pdf
(218 pages)
Specifications of A3P400-FGG256
Processor Series
A3P400
Core
IP Core
Maximum Operating Frequency
350 MHz
Number Of Programmable I/os
194
Data Ram Size
55296
Delay Time
11.1 ns
Supply Voltage (max)
1.575 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
A3PE-Proto-Kit, A3PE-Brd1500-Skt, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
1.425 V
Number Of Gates
400 K
Package / Case
FPBGA-256
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
A3P400-FGG256C
Manufacturer:
ACTEL
Quantity:
1 156
Company:
Part Number:
A3P400-FGG256I
Manufacturer:
YAGEO
Quantity:
460 000
Company:
Part Number:
A3P400-FGG256I
Manufacturer:
ACT
Quantity:
1 170
Company:
Part Number:
A3P400-FGG256I
Manufacturer:
Microsemi SoC
Quantity:
10 000
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Table 2-29 • I/O Output Buffer Maximum Resistances
Standard
3.3 V LVTTL / 3.3 V LVCMOS
3.3 V LVCMOS Wide Range
2.5 V LVCMOS
1.8 V LVCMOS
1.5 V LVCMOS
3.3 V PCI/PCI-X
Notes:
1. These maximum values are provided for informational reasons only. Minimum output buffer resistance
2. R
3. R
4. All LVCMOS 3.3 V software macros support LVCMOS 3.3 V wide range as specified in the JESD-8B
values depend on V
considerations and detailed output buffer resistances, use the corresponding IBIS models located on the
Actel website at http://www.actel.com/download/ibis/default.aspx.
specification.
(PULL-DOWN-MAX)
(PULL-UP-MAX)
Applicable to Standard Plus I/O Banks
= (VCCImax – VOHspec) / I
= (VOLspec) / I
CCI
4
, drive strength selection, temperature, and process. For board design
OLspec
Per PCI/PCI-X specification
R e v i s i o n 9
O H spec
Drive Strength
100 µA
12 mA
16 mA
12 mA
2 mA
4 mA
6 mA
8 mA
2 mA
4 mA
6 mA
8 mA
2 mA
4 mA
6 mA
8 mA
2 mA
4 mA
1
R
PULL-DOWN
ProASIC3 Flash Family FPGAs
TBD
(Ω)
100
100
100
100
200
100
200
100
50
50
25
25
50
50
25
50
50
25
2
R
PULL-UP
TBD
(Ω)
300
300
150
150
200
200
100
100
225
224
112
112
75
75
50
56
56
75
3
2- 27
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