APA300-FGG144 Actel, APA300-FGG144 Datasheet - Page 50
APA300-FGG144
Manufacturer Part Number
APA300-FGG144
Description
FPGA - Field Programmable Gate Array 300K System Gates
Manufacturer
Actel
Datasheet
1.APA075-FGG144.pdf
(178 pages)
Specifications of APA300-FGG144
Processor Series
APA300
Core
IP Core
Maximum Operating Frequency
150 MHz
Number Of Programmable I/os
290
Data Ram Size
73728
Supply Voltage (max)
2.7 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
APA-Eval-Kit, APA-Eval-BRD1, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, Flashpro 4, Flashpro 3, Flashpro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
2.3 V
Number Of Gates
300 K
Package / Case
FPBGA-144
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
APA300-FGG144A
Manufacturer:
Microsemi SoC
Quantity:
10 000
Company:
Part Number:
APA300-FGG144I
Manufacturer:
Microsemi SoC
Quantity:
10 000
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Table 2-25 • DC Specifications (3.3 V PCI Operation)
2 -4 0
Symbol
V
V
V
V
I
I
V
V
C
C
Notes:
1. For PCI operation, use GL33, OTB33PH, OB33PH, IOB33PH, IB33, or IB33S macro library cell only.
2. All process conditions. Junction Temperature: –40 to +110°C for Commercial and Industrial devices and –55 to +125°C for Military.
3. This specification is guaranteed by design. It is the minimum voltage to which pull-up resistors are calculated to pull a floated
4. Input leakage currents include hi-Z output leakage for all bidirectional buffers with tristate outputs.
IPU
IL
DD
DDP
IH
IL
OH
OL
IN
CLK
ProASIC
network. Designers with applications sensitive to static power utilization should ensure that the input buffer is conducting minimum
current at this input voltage.
PLUS
Parameter
Supply Voltage for Core
Supply Voltage for I/O Ring
Input High Voltage
Input Low Voltage
Input Pull-up Voltage
Input Leakage Current
Output High Voltage
Output Low Voltage
Input Pin Capacitance (except CLK)
CLK Pin Capacitance
Flash Family FPGAs
3
4
Condition
0 < V
I
I
OUT
OUT
= –500 µA
= 1500 µA
IN
< V
1
DDP
v5.9
Std.
0.5V
0.7V
0.9V
Min.
–0.5
–10
Commercial/
2.3
3.0
5
Industrial
DDP
DDP
DDP
V
DDP
0.3V
0.1V
Max.
2.7
3.6
10
10
12
2
+ 0.5
DDP
DDP
Military/MIL-STD- 883
0.5V
0.7V
0.9V
Min.
–0.5
–50
3.0
2.3
5
DDP
DDP
DDP
V
0.3V
0.1V
DDP
Max.
2.7
3.6
50
10
12
+ 0.5
DDP
DDP
2
Units
μA
pF
pF
V
V
V
V
V
V
V
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