MSC8144SVT1000A Freescale Semiconductor, MSC8144SVT1000A Datasheet - Page 54
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MSC8144SVT1000A
Manufacturer Part Number
MSC8144SVT1000A
Description
IC DSP QUAD 1GHZ 783FCPBGA
Manufacturer
Freescale Semiconductor
Series
MSC81xx StarCorer
Type
SC3400 Corer
Datasheet
1.MSC8144VT800A.pdf
(80 pages)
Specifications of MSC8144SVT1000A
Interface
Ethernet, I²C, SPI, TDM, UART, UTOPIA
Clock Rate
1.0GHz
Non-volatile Memory
External
On-chip Ram
10.5MB
Voltage - I/o
3.30V
Voltage - Core
1.00V
Operating Temperature
0°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
783-BBGA, FCBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MSC8144SVT1000A
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
2.6.9
Figure 23
2.6.10
This section describes the AC electrical characteristics for the Ethernet interface.
There are programmable delay units (PDU) that should be programmed differently for each Interface to meet timing. There is
a general configuration register 4 (GCR4) used to configure the timing. For additional information, see the MSC8144 Reference
Manual.
2.6.10.1
54
TIMERx frequency
TIMERx Input high phase
TIMERx Output low phase
ETHMDC to ETHMDIO delay
ETHMDIO to ETHMDC rising edge setup time
ETHMDC rising edge to ETHMDIO hold time
Notes:
1.
2.
shows the timer input AC timing
TIMERx (Input)
Timer Timing
Ethernet Timing
Program the ETHMDC frequency (f
source clock and configuration of MIIMCFG[MCS] and UPSMR[MDCP]. For example, for a source clock of 400 MHz, to
achieve f
configuration details.
The value depends on the source clock. For example, for a source clock of 267 MHz, the delay is 70 ns. For a source clock of
333 MHz, the delay is 58 ns.
Management Interface Timing
MDC
= 2.5 MHz, program MIIMCFG[MCS] = 0x4 and UPSMR[MDCP] = 0. See the MSC8144 Reference Manual for
2
Table 40. Ethernet Controller Management Interface Timing
MSC8144 Quad Core Digital Signal Processor Data Sheet, Rev. 16
Characteristics
Characteristics
MDC
Figure 23. Timer Timing
Table 39. Timer Timing
T
) to a maximum value of 2.5 MHz (400 ns period for t
TMCH
T
TMREFCLK
T
TMCL
t
t
t
Symbol
MDKHDX
MDDVKH
MDDXKH
T
Symbol
TMREFCLK
T
T
TMCH
TMCL
Min
10
MDC
7
0
). The value depends on the
Freescale Semiconductor
Max
10.0
Min
70
4.0
4.0
—
—
Unit
Unit
ns
ns
ns
ns
ns
ns