XC3S1400AN-4FGG484I Xilinx Inc, XC3S1400AN-4FGG484I Datasheet - Page 33

no-image

XC3S1400AN-4FGG484I

Manufacturer Part Number
XC3S1400AN-4FGG484I
Description
IC FPGA SPARTAN-3AN 484FPGA
Manufacturer
Xilinx Inc
Series
Spartan™-3ANr

Specifications of XC3S1400AN-4FGG484I

Number Of Logic Elements/cells
25344
Number Of Labs/clbs
2816
Total Ram Bits
589824
Number Of I /o
372
Number Of Gates
1400000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
484-BBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XC3S1400AN-4FGG484I
Manufacturer:
XILINX
Quantity:
890
Part Number:
XC3S1400AN-4FGG484I
Manufacturer:
XILINX
0
Page to Buffer Transfer
Spartan-3AN FPGA In-System Flash User Guide
UG333 (v2.1) January 15, 2009
R
Upon reaching the end of a memory page, the ISF memory continues reading at the
beginning of the next page, as shown in
a page boundary. After reading the last bit in the memory array, the ISF continues reading
but returns to the beginning of the first page of memory. Again, there is no added delay
when wrapping around from the end of the array to the beginning of the array. A Low-to-
High transition on CSB terminates the read operation and the MISO output pin returns
High.
The Fast Read command bypasses both SRAM page buffers; the contents of the buffers
remain unchanged.
The Page to Buffer Transfer command copies the entire contents of an ISF memory page
into the specified SRAM page buffer, as shown in
memory page are unaffected.
To issue a Page to Buffer Transfer command, the FPGA application must perform the
following actions.
Drive CSB Low while CLK is High or on the rising edge of CLK.
On the falling edge of CLK, serially clock in the appropriate Page to Buffer Transfer
command code, shown in
Page to Buffer 1 Transfer
MOSI
MISO
Page to Buffer 2 Transfer
CSB
CLK
SPI_ACCESS
Figure 3-4: Page to Buffer Transfer Command
available on
Buffer 2 not
XC3S50AN
www.xilinx.com
Table
3-4, most-significant bit first.
Figure
(0x53)
(0x55)
3-1. There is no added delay when crossing
Entire contents of selected ISF page
are copied to specified buffer
READY/BUSY
Figure
Status Register
7
0 = Page transfer in progress
1 = Data available in page buffer
T
XFER
Flash Memory Array
3-4. The contents of the ISF
6
= 400 μs
5
Page address
4
Page to Buffer Transfer
3
UG333_c3_07_082307
2
1
0
33

Related parts for XC3S1400AN-4FGG484I