PIC16LF1527-I/MR Microchip Technology, PIC16LF1527-I/MR Datasheet - Page 95
![MCU PIC 28KB FLASH 64QFN](/photos/16/3/160368/qfn64_sml.jpg)
PIC16LF1527-I/MR
Manufacturer Part Number
PIC16LF1527-I/MR
Description
MCU PIC 28KB FLASH 64QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet
1.PIC16LF1526T-IPT.pdf
(354 pages)
Specifications of PIC16LF1527-I/MR
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
28KB (16K x 14)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 30x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN Exposed Pad
Processor Series
PIC16F
Core
PIC
Data Ram Size
768 B
Interface Type
MI2C, SPI, EUSART
Number Of Timers
9
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
MPLAB IDE Software
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
- Current page: 95 of 354
- Download datasheet (3Mb)
9.0
The PIC16F1526/27 has an internal Low Dropout
Regulator (LDO) which provides operation above 3.6V.
The LDO regulates a voltage for the internal device
logic while permitting the V
at a higher voltage. There is no user enable/disable
control available for the LDO, it is always active. The
PIC16LF1526/27 operates at a maximum V
and does not incorporate an LDO.
A device I/O pin may be configured as the LDO voltage
output, identified as the V
required, an external low-ESR capacitor may be con-
nected to the V
The VCAPEN bit of Configuration Word 2 enables the
V
TABLE 9-1:
TABLE 9-2:
2011 Microchip Technology Inc.
CONFIG2
Legend:
Note 1:
CAP
Name
pin. Refer to
VCAPEN
LOW DROPOUT (LDO)
VOLTAGE REGULATOR
— = unimplemented locations read as ‘0’. Shaded cells are not used by LDO.
PIC16F1526/27 only.
0
1
Bits
13:8
7:0
CAP
VCAPEN SELECT BIT
SUMMARY OF CONFIGURATION WORD WITH LDO
Table
pin for additional regulator stability.
Bit -/7
—
9-1.
DD
—
CAP
and I/O pins to operate
Bit -/6
—
pin. Although not
No Vcap
RF0
Pin
Bit 13/5
DD
LVP
—
of 3.6V
Preliminary
VCAPEN
Bit 12/4
DEBUG
(1)
On power-up, the external capacitor will load the LDO
voltage regulator. To prevent erroneous operation, the
device is held in Reset while a constant current source
charges the external capacitor. After the cap is fully
charged, the device is released from Reset. For more
information on recommended capacitor values and the
constant current rate, refer to the LDO Regulator
Characteristics Table in Section 25.0 “Electrical
Specifications”.
Bit 11/3
LPBOR
—
PIC16(L)F1526/27
Bit 10/2
BORV
—
STVREN
Bit 9/1
WRT<1:0>
Bit 8/0
DS41458A-page 95
—
Register
on Page
48
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