PIC18F46K80-I/P Microchip Technology, PIC18F46K80-I/P Datasheet - Page 281
PIC18F46K80-I/P
Manufacturer Part Number
PIC18F46K80-I/P
Description
MCU PIC 64KB FLASH 40DIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet
1.PIC18F25K80-ISO.pdf
(628 pages)
Specifications of PIC18F46K80-I/P
Core Size
8-Bit
Program Memory Size
64KB (32K x 16)
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Core Processor
PIC
Speed
64MHz
Connectivity
ECAN, I²C, LIN, SPI, UART/USART
Number Of I /o
35
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Controller Family/series
PIC18
Ram Memory Size
4KB
Cpu Speed
16MIPS
No. Of Pwm Channels
5
Embedded Interface Type
I2C, SPI, USART
Processor Series
PIC18F46K80
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
35
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Part Number:
PIC18F46K80-I/PT
Manufacturer:
BROADCOM
Quantity:
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Company:
Part Number:
PIC18F46K80-I/PT
Manufacturer:
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Quantity:
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Part Number:
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Manufacturer:
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Quantity:
20 000
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20.4.2
In Full-Bridge mode, all four pins are used as outputs.
An example of a full-bridge application is provided in
Figure
In the Forward mode, the P1A pin is driven to its active
state and the P1D pin is modulated, while the P1B and
P1C pins are driven to their inactive state, as provided in
Figure
FIGURE 20-8:
2011 Microchip Technology Inc.
20-8.
20-9.
FULL-BRIDGE MODE
P1A
P1B
P1C
P1D
EXAMPLE OF FULL-BRIDGE APPLICATION
FET
Driver
FET
Driver
Preliminary
QA
QB
PIC18F66K80 FAMILY
In the Reverse mode, the P1C pin is driven to its active
state and the P1B pin is modulated, while the P1A and
P1D pins are driven to their inactive state, as provided
Figure
The P1A, P1B, P1C and P1D outputs are multiplexed
with the port data latches. The associated TRIS bits
must be cleared to configure the P1A, P1B, P1C and
P1D pins as outputs.
20-9.
Load
V+
V-
QC
QD
FET
Driver
FET
Driver
DS39977C-page 281
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