FT232HQ-REEL FTDI, Future Technology Devices International Ltd, FT232HQ-REEL Datasheet - Page 17

• Manufacturer Part Number: FT232HQ-REEL
• Description: IC HS USB TO UART/FIFO 48QFN
• Manufacturer: FTDI, Future Technology Devices International Ltd

Specifications of FT232HQ-REEL

• Number Of Channels: 1, UART
• Fifo's: *
• Protocol: RS-232, RS-422, RS-485
• Voltage - Supply: 1.62 V ~ 1.98 V, 2.97 V ~ 3.63 V
• With Parallel Port: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• Mounting Type: *
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• With Auto Flow Control: -
• With Irda Encoder/decoder: -
• With Cmos: -
• Other names: 768-1102-2

3.5.5 FT232H pins used in an MPSSE
The FT232H has a Multi-Protocol Synchronous Serial Engine (MPSSE). This mode is enabled by sending a
software command (FT_SetBitMode) to the FTDI D2xx driver. The MPSSE can be configured to a number
of industry standard serial interface protocols such as JTAG, I
implement a proprietary bus protocol. For example, it is possible to connect FT232H‟s to an SRAM
configurable FPGA such as supplied by Altera or Xilinx. The FPGA device would normally not be configured
(i.e. have no defined function) at power-up. Application software on the PC could use the MPSSE (and
D2XX driver) to download configuration data to the FPGA over USB. This data would define the hardware
function on power up. The MPSSE can be used to control a number of GPIO pins. When configured in this
mode, the pins used and the descriptions of the signals are shown in Table 3.10
Table 3.10 MPSSE Configured Pin Descriptions
For functional description of this mode, please refer to section 4.8
Pin No.
13
14
15
16
17
18
19
20
21
25
26
27
28
29
30
31
Copyright © 2011 Future Technology Devices International Limited
TMS/CS
GPIOH0
GPIOH1
GPIOH2
GPIOH3
GPIOH4
GPIOH5
GPIOH6
GPIOH7
TCK/SK
TDI/DO
TDO/DI
GPIOL0
GPIOL1
GPIOL2
GPIOL3
Name
FT232H SINGLE CHANNEL HI-SPEED USB TO MULTIPURPOSE UART/FIFO IC
OUTPUT
OUTPUT
OUTPUT
INPUT
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Clock Signal Output. For example:
JTAG – TCK, Test interface clock
SPI (MASTER) – SK, Serial Clock
Serial Data Output. For example:
JTAG – TDI, Test Data Input
SPI (MASTER) – DO
Serial Data Input. For example:
JTAG – TDO, Test Data output
SPI (MASTER) – DI, Serial Data Input
Output Signal Select. For example:
JTAG – TMS, Test Mode Select
SPI (MASTER) – CS, Serial Chip Select
General Purpose input/output
General Purpose input/output
General Purpose input/output
General Purpose input/output
General Purpose input/output
General Purpose input/output
General Purpose input/output
General Purpose input/output
General Purpose input/output
General Purpose input/output
General Purpose input/output
General Purpose input/output
MPSSE Configuration Description
2
C or SPI (MASTER), or it can be used to
Document No.: FT_000288
Clearance No.: FTDI #199
Datasheet Version 1.2
17