FT232HQ-REEL FTDI, Future Technology Devices International Ltd, FT232HQ-REEL Datasheet - Page 38

• Manufacturer Part Number: FT232HQ-REEL
• Description: IC HS USB TO UART/FIFO 48QFN
• Manufacturer: FTDI, Future Technology Devices International Ltd

Specifications of FT232HQ-REEL

• Number Of Channels: 1, UART
• Fifo's: *
• Protocol: RS-232, RS-422, RS-485
• Voltage - Supply: 1.62 V ~ 1.98 V, 2.97 V ~ 3.63 V
• With Parallel Port: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• Mounting Type: *
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• With Auto Flow Control: -
• With Irda Encoder/decoder: -
• With Cmos: -
• Other names: 768-1102-2

4.9.1 Outgoing Fast Serial Data
To send fast serial data out of the FT232H, the external device must drive the FSCLK clock. If the FT232H
has data ready to send, it will drive FSDO output low to indicate the start bit. It will not do this if it is
currently receiving data from the external device. This is illustrated in Figure 4.18
Figure 4.18 Fast Serial Interface Output Data
Notes :-
4.9.2 Incoming Fast Serial Data
An external device is allowed to send data into the FT232H if FSCTS is high. On receipt of a zero START
bit on FSDI, the FT232H will drop FSCTS on the next positive clock edge. The data from bits 0 to 7 are
then clocked in (LSB first). The last bit (DEST) determines where the data will be written to. This bit is
always 0 with the FT232H. This is illustrated in Figure 4.19
Figure 4.19 Fast Serial Interface Input Data
Notes:-
FSCTS
FSCLK
FSDI
1. The first bit output (Start bit) is always 0.
2. FSDO is always sent LSB first.
3. The last serial bit output is the source bit (SRCE) is always 0.
4. If the target device is unable to accept the data when it detects the START bit, it should stop the
1. The first bit input (Start bit) is always 0.
2. FSDI is always received LSB first.
3. The last received serial bit is the destination bit (DEST) is always 0.
4.
FSCLK
FSDO
FSCLK until it can accept the data.
data bit 0 (D0) and stays low until the chip can accept more data.
The target device should ensure that FSCTS is high before it sends data. FSCTS goes low after
Start
Bit
0
Start
Bit
0
D0
Copyright © 2011 Future Technology Devices International Limited
D0
D1
FT232H SINGLE CHANNEL HI-SPEED USB TO MULTIPURPOSE UART/FIFO IC
D1
D2
D2
Data Bits - LSB first
D3
Data Bits - LSB first
D3
D4
D4
D5
D5
D6
D6
D7
D7
Destination
DEST
Bit
Source
SRCE
Bit
Document No.: FT_000288
Clearance No.: FTDI #199
Datasheet Version 1.2
38