AT25DF081A-MH-T Atmel, AT25DF081A-MH-T Datasheet - Page 17

• Manufacturer Part Number: AT25DF081A-MH-T
• Description: IC FLASH 8MBIT SPI 8UDFN
• Manufacturer: Atmel

Specifications of AT25DF081A-MH-T

• Format - Memory: FLASH
• Memory Type: DataFLASH
• Memory Size: 8M (4096 pages x 256 bytes)
• Speed: 100MHz
• Interface: SPI, RapidS
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-UDFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8715B–SFLSH–8/10
9.
9.1
Protection Commands and Features
Write Enable
The Write Enable command is used to set the Write Enable Latch (WEL) bit in the Status Register to a logical “1”
state. The WEL bit must be set before a Byte/Page Program, erase, Protect Sector, Unprotect Sector, Sector Lock-
down, Freeze Sector Lockdown State, Program OTP Security Register, or Write Status Register command can be
executed. This makes the issuance of these commands a two step process, thereby reducing the chances of a
command being accidentally or erroneously executed. If the WEL bit in the Status Register is not set prior to the
issuance of one of these commands, then the command will not be executed.
To issue the Write Enable command, the CS pin must first be asserted and the opcode of 06h must be clocked into
the device. No address bytes need to be clocked into the device, and any data clocked in after the opcode will be
ignored. When the CS pin is deasserted, the WEL bit in the Status Register will be set to a logical “1”. The com-
plete opcode must be clocked into the device before the CS pin is deasserted, and the CS pin must be deasserted
on an even byte boundary (multiples of eight bits); otherwise, the device will abort the operation and the state of the
WEL bit will not change.
Figure 9-1.
SCK
SO
CS
SI
Write Enable
HIGH-IMPEDANCE
MSB
0
0
0
1
0
2
OPCODE
0
3
0
4
1
5
1
6
0
7
Atmel AT25DF081A
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