AT25DF081A-MH-T Atmel, AT25DF081A-MH-T Datasheet - Page 30

• Manufacturer Part Number: AT25DF081A-MH-T
• Description: IC FLASH 8MBIT SPI 8UDFN
• Manufacturer: Atmel

Specifications of AT25DF081A-MH-T

• Format - Memory: FLASH
• Memory Type: DataFLASH
• Memory Size: 8M (4096 pages x 256 bytes)
• Speed: 100MHz
• Interface: SPI, RapidS
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-UDFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

10.5
Figure 10-5. Read OTP Security Register
30
SCK
CS
SO
SI
Read OTP Security Register
The OTP Security Register can be sequentially read in a similar fashion to the Read Array operation up to the max-
imum clock frequency specified by f
the opcode of 77h must be clocked into the device. After the opcode has been clocked in, the three address bytes
must be clocked in to specify the starting address location of the first byte to read within the OTP Security Register.
Following the three address bytes, two dummy bytes must be clocked into the device before data can be output.
After the three address bytes and the dummy bytes have been clocked in, additional clock cycles will result in OTP
Security Register data being output on the SO pin. When the last byte (00007Fh) of the OTP Security Register has
been read, the device will continue reading back at the beginning of the register (000000h). No delays will be
incurred when wrapping around from the end of the register to the beginning of the register.
Deasserting the CS pin will terminate the read operation and put the SO pin into a high-impedance state. The CS
pin can be deasserted at any time and does not require that a full byte of data be read.
Atmel AT25DF081A
MSB
HIGH-IMPEDANCE
0
0
1
1
1
2
OPCODE
1
3
0
4
1
5
1
6
1
7
MSB
A
8
A
9
ADDRESS BITS A23-A0
A
10 11
MAX
A
A
12
. To read the OTP Security Register, the CS pin must first be asserted and
A
A
29 30
A
A
31 32
MSB
X
X
33
X
34
DON'T CARE
X
35
X
36
X
X
X
X
MSB
D
D
DATA BYTE 1
D
D
D
D
D
8715B–SFLSH–8/10
D
MSB
D
D