ISL62882IRTZ Intersil, ISL62882IRTZ Datasheet - Page 18

• Manufacturer Part Number: ISL62882IRTZ
• Description: IC REG PWM 2PHASE BUCK 40TQFN
• Manufacturer: Intersil

Specifications of ISL62882IRTZ

• Applications: Controller, Intel IMVP-6.5™
• Voltage - Input: 5 V ~ 25 V
• Number Of Outputs: 1
• Voltage - Output: 0.0125 V ~ 1.5 V
• Operating Temperature: -40°C ~ 100°C
• Mounting Type: *
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

CCM Switching Frequency
The R
sets the VW windows size, therefore sets the switching
frequency. When the ISL62882 is in continuous
conduction mode (CCM), the switching frequency is not
absolutely constant due to the nature of the R
modulator. As explained in the “Multiphase R3™
Modulator” on page 12, the effective switching frequency
will increase during load insertion and will decrease
during load release to achieve fast response. On the
other hand, the switching frequency is relatively constant
at steady state. Variation is expected when the power
stage condition, such as input voltage, output voltage,
load, etc. changes. The variation is usually less than 15%
and doesn’t have any significant effect on output voltage
ripple magnitude. Equation 12 gives an estimate of the
frequency-setting resistor R
approximately 300kHz switching frequency. Lower
resistance gives higher switching frequency.
Modes of Operation
The ISL62882 can be configured for 2- or 1-phase
operation.
For 1-phase configuration, tie the ISEN2 pin to 5V. In this
configuration, only phase-1 is active.
Table 2 shows the ISL62882 configurations, programmed
by the ISEN2 pin status and the Rbias value.
If the ISEN2 pin is connected to the power stage, the
ISL62882 is in 2-phase CPU VR configuration.
Rbias = 147kΩ disables the overshoot reduction function
and Rbias = 47kΩ enables it.
R
Connected to the
Power Stage
Tied to 5V
2-phase CPU
Configuration
1-phase CPU
Configuration
1-phase GPU
Configuration
fset
CONFIG.
(
ISEN2
kΩ
fset
TABLE 3. ISL62882 MODES OF OPERATION
)
TABLE 2. ISL62882 CONFIGURATIONS
=
resistor between the COMP and the VW pins
(
Period μs
PSI# DPRSLPVR
0
0
1
1
x
x
Rbias
(kΩ) CONFIGURATION
147 2-phase CPU VR
147 1-phase CPU VR
(
47
47
) 0.29
–
1-phase GPU VR
0
1
0
1
0
1
0
1
18
)
fset
×
2.65
value. 8kΩ R
OPERATIONAL
1-phase CCM
1-phase DE
2-phase CCM
1-phase DE
1-phase CCM
1-phase DE
1-phase CCM
1-phase DE
MODE
ISL62882, ISL62882B
OVERSHOOT
REDUCTION
FUNCTION
fset
See Table 4
Disabled
3™
Enabled
VOLTAGE
10mV/µs
gives
5mV/µs
SLEW
RATE
(EQ. 12)
If ISEN2 is tied to 5V, the ISL62882 is configured for
1-phase operation. Rbias = 147kΩ sets 1-phase CPU VR
configuration and Rbias=47kΩ sets 1-phase GPU
configuration.
Table 3 shows the ISL62882 operational modes,
programmed by the logic status of the PSI# and
DPRSLPVR pins.
In 2-phase configuration, the ISL62882 enters 1-phase
CCM for (PSI# = 0 and DPRSLPVR = 0). It drops phase 2
and reduces the overcurrent and the way-overcurrent
protection levels to 1/2 of the initial values. The
ISL62882 enters 1-phase DE mode when DPRSLPVR = 1
by dropping phase 2.
In 1-phase configuration, the ISL62882 does not change
the operational mode when the PSI# signal changes
status. It enters 1-phase DE mode when
DLPRSLPVR = 1.
Dynamic Operation
When the ISL62882 is configured for CPU VR application,
it responds to VID changes by slewing to the new voltage
at 5mV/µs slew rate. As the output approaches the VID
command voltage, the dv/dt moderates to prevent
overshoot. Geyserville-III transitions commands one LSB
VID step (12.5mV) every 2.5µs, controlling the effective
dv/dt at 5mv/µs. The ISL62882 is capable of 5mV/µs
slew rate.
When the ISL62882 is configured for GPU VR application,
it responds to VID changes by slewing to the new voltage
at a slew rate set by the logic status on the DPRSLPVR
pin. The slew rate is 5mV/µs when DPRSLPVR=0 and is
doubled when DPRSLPVR = 1.
When the ISL62882 is in DE mode, it will actively drive
the output voltage up when the VID changes to a higher
value. It’ll resume DE mode operation after reaching the
new voltage level. If the load is light enough to warrant
DCM, it will enter DCM after the inductor current has
crossed zero for four consecutive cycles. The ISL62882
will remain in DE mode when the VID changes to a lower
value. The output voltage will decay to the new value and
the load will determine the slew rate. Over-voltage
protection is blanked during VID down transition in DE
mode until the output voltage is within 60mV of the VID
value.
During load insertion response, the Fast Clock function
increases the PWM pulse response speed. The ISL62882
monitors the VSEN pin voltage and compares it to
100ns-filtered version. When the unfiltered version is
20mV below the filtered version, the controller knows
there is a fast voltage dip due to load insertion, hence
issues an additional master clock signal to deliver a PWM
pulse immediately.
The R
forward. The output voltage is insensitive to a fast slew
rate input voltage change.
3™
modulator intrinsically has voltage feed-
FN6890.3