IP1206TRPBF International Rectifier, IP1206TRPBF Datasheet - Page 27

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IP1206TRPBF

Manufacturer Part Number
IP1206TRPBF
Description
IC PWR BLOCK MULTIPHASE 30A LGA
Manufacturer
International Rectifier
Series
iPOWIR™r
Type
Step-Down (Buck), PWM - Voltage Moder
Datasheet

Specifications of IP1206TRPBF

Internal Switch(s)
Yes
Synchronous Rectifier
Yes
Number Of Outputs
1 or 2
Voltage - Output
0.8 V ~ 5.5 V
Current - Output
30A, 15A
Frequency - Switching
200kHz ~ 600kHz
Voltage - Input
7.5 V ~ 14.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
*
Package / Case
*
Package
LGA - 15.5 x 9.25
Circuit
Single Output or Dual Ch
Iout (a)
30
Switch Freq (khz)
200 - 600
Input Range (v)
7.5 - 14.5
Output Range (v)
0.8 - 5.5
Ocp Otp Uvlo Pre-bias Soft Start And
Pre-Bias + SEQ + SYNC + Tracking
Pbf
PbF Option Available
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IP1206TRPBF
Manufacturer:
IR
Quantity:
4 216
Part Number:
IP1206TRPBF
Manufacturer:
NEC
Quantity:
200
PCB Layout Guidelines
The following guidelines are recommended to reduce the parasitic values and optimize overall performance.
International Rectifier application notes AN1028 and AN1029 for further footprint design guidance.
performance.
to plug the via hole. Vias with a 13mil drill hole and 25mil capture pad were used in this example.
input capacitor ESR.
a space constraint on the top layer capacitors C3,C4, C7 and C8 can be placed on the bottom layer directly
below the footprints of C1, C2, C5 and C6.
All pads on the iP1206 footprint design need to be Solder-mask defined (see Figure 26).
Place as many vias around the Power pads (VIN, VSW, and PGND) for both electrical and optimal thermal
Vias in between the different power pads may overlap the pad opening and solder mask edge without the need
A minimum of six 10µF, X5R, 16V ceramic capacitors per iP1206 are recommended for the lowest loss due to
Placement of the ceramic input capacitors is critical to optimize switching performance. In cases where there is
Dedicate at least two layers for PGND only.
Duplicate the Power Nodes on multiple layers (refer to AN1029).
Refer to AN-1030 for information on applying IPOWIR products in your thermal environment for Safe Operation.
www.irf.com
Fig. 27 Top component and via placement (Topside, transparent view down)
2/26/2008
iP1206PbF
Also refer to
27

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