ISL51002-EVALZ Intersil, ISL51002-EVALZ Datasheet - Page 6

• Manufacturer Part Number: ISL51002-EVALZ
• Description: EVAL BOARD FOR ISL51002
• Manufacturer: Intersil

Specifications of ISL51002-EVALZ

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Timing Diagrams
Data Output Setup and Hold Timing
RGB Output Data Timing and Latency
YUV Output Data Timing and Latency
PIXEL DATA
DATACLK
R/G/B[9:0]
VIDEO IN
ANALOG
DATACLK
HSYNC
DATACLK
DATACLK
VIDEO IN
ANALOG
HSYNC
G[9:0]
R[9:0]
B[9:0]
HS
HS
OUT
OUT
IN
IN
P
P
0
0
6
P
P
1
1
8 DATACLK PIPELINE LATENCY
8 DATACLK PIPELINE LATENCY
P
P
2
2
THE HSYNC EDGE (PROGRAMMABLE LEADING OR TRAILING) THAT THE DPLL IS LOCKED TO.
THE SAMPLING PHASE SETTING DETERMINES ITS RELATIVE POSITION TO THE REST OF THE
AFE’S OUTPUT SIGNALS
THE HSYNC EDGE (PROGRAMMABLE LEADING OR TRAILING) THAT THE DPLL IS LOCKED
TO. THE SAMPLING PHASE SETTING DETERMINES ITS RELATIVE POSITION TO THE REST
OF THE AFE’S OUTPUT SIGNALS
P
t
SETUP
P
3
3
ISL51002
WIDTH AND POLARITY
P
P
4
PROGRAMMABLE
4
t
HOLD
WIDTH AND POLARITY
P
PROGRAMMABLE
5
P
5
P
6
P
6
P
7
P
7
P
8
P
G
B
8
0
0
(U
(Y
D
P
O
O
) G
) R
0
9
P
9
0
1
(Y
(V
P
D
1
0
10
) B
) G
1
P
10
2
2
(U
(Y
P
2
2
D
11
)
)
2
September 19, 2007
P
G
R
11
2
3
(Y
(V
P
3
2
12
D
)
)
FN6164.2
3
P
12