ADC16DV160HFEB/NOPB National Semiconductor, ADC16DV160HFEB/NOPB Datasheet - Page 26

• Manufacturer Part Number: ADC16DV160HFEB/NOPB
• Description: EVAL BOARD FOR ADC16DV160
• Manufacturer: National Semiconductor

Specifications of ADC16DV160HFEB/NOPB

• Number Of Adc's: *
• Number Of Bits: 16
• Sampling Rate (per Second): 160M
• Data Interface: *
• Inputs Per Adc: *
• Input Range: *
• Voltage Supply Source: Analog and Digital
• Utilized Ic / Part: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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Fixed Pattern Mode:
SEQ0 and SEQ1
Bits (7:5)
Bits (4:2)
Bit 1
Bit 0
Fixed Pattern Mode:
SEQ2 and SEQ3
Bits (7:5)
Bits (4:2)
Bit 1
Bit 0
Fixed Pattern Mode:
SEQ4 and SEQ5
Bits (7:5)
Bits (4:2)
Bit 1
Bit 0
Fixed Pattern Mode:
SEQ6 and SEQ7
Bits (7:5)
Bits (4:2)
Bit 1
Bit 0
Fixed Pattern Mode:
LSB PATTERN <110>
Bits (7:0)
Fixed Pattern Mode:
MSB PATTERN <110>
Bits (7:0)
SEQ7<2>
SEQ1<2>
SEQ3<2>
SEQ5<2>
D<7>
D<7>
7
7
7
7
7
7
3 bit pattern code for SEQ7. 010 is the default.
3 bit pattern code for SEQ6. 010 is the default.
Reserved, Must be set to 0.
Reserved, Must be set to 0.
8 LSBs of a fixed pattern for Sequence >110>
All '0' for default.
8 MSBs of a fixed pattern for Sequence >110>
All '0' for default.
3 bit pattern code for SEQ1. 010 is the default.
3 bit pattern code for SEQ0. 010 is the default.
Reserved, Must be set to 0.
Reserved, Must be set to 0.
3 bit pattern code for SEQ3. 010 is the default.
3 bit pattern code for SEQ2. 010 is the default.
Reserved, Must be set to 0.
Reserved, Must be set to 0.
3 bit pattern code for SEQ5. 010 is the default.
3 bit pattern code for SEQ4. 010 is the default.
Reserved, Must be set to 0.
Reserved, Must be set to 0.
SEQ7<1>
SEQ1<1>
SEQ3<1>
SEQ5<1>
D<6>
D<6>
6
6
6
6
6
6
SEQ7<0>
SEQ1<0>
SEQ3<0>
SEQ5<0>
D<5>
D<5>
5
5
5
5
5
5
SEQ6<2>
SEQ0<2>
SEQ2<2>
SEQ4<2>
D<4>
D<4>
4
4
4
4
4
4
26
Addr: 0Bh
Addr: 0Ch
Addr: 0Dh
Addr: 0Ah
Addr: 08h
Addr: 09h
SEQ6<1>
SEQ0<1>
SEQ2<1>
SEQ4<1>
D<3>
D<3>
3
3
3
3
3
3
SEQ6<0>
SEQ0<0>
SEQ2<0>
SEQ4<0>
D<2>
D<2>
2
2
2
2
2
2
Reserved
Reserved
Reserved
Reserved
D<1>
D<1>
1
1
1
1
1
1
Reserved
Reserved
Reserved
Reserved
D<0>
D<0>
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W