AD9225-EB Analog Devices Inc, AD9225-EB Datasheet - Page 10

• Manufacturer Part Number: AD9225-EB
• Description: BOARD EVAL FOR AD9225
• Manufacturer: Analog Devices Inc

Specifications of AD9225-EB

• Rohs Status: RoHS non-compliant
• Number Of Adc's: 1
• Number Of Bits: 12
• Sampling Rate (per Second): 25M
• Data Interface: Parallel
• Inputs Per Adc: 1 Differential
• Input Range: 4 Vpp
• Power (typ) @ Conditions: 335mW @ 25MSPS
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: AD9225

AD9225
REFERENCE OPERATION
The AD9225 contains an on-board band gap reference that
provides a pin strappable option to generate either a 1 V or 2 V
output. With the addition of two external resistors, the user can
generate reference voltages other than 1 V and 2 V. Another
alternative is to use an external reference for designs requiring
enhanced accuracy and/or drift performance. See Table II for
a summary of the pin strapping options for the AD9225 refer-
ence configurations.
Figure 5 shows a simplified model of the internal voltage
reference of the AD9225. A pin strappable reference amplifier
buffers a 1 V fixed reference. The output from the reference
amplifier, A1, appears on the VREF pin. The voltage on the
VREF pin determines the full-scale input span of the ADC.
This input span equals
The voltage appearing at the VREF pin as well as the state of
the internal reference amplifier, A1, are determined by the volt-
age appearing at the SENSE pin. The logic circuitry contains
two comparators that monitor the voltage at the SENSE pin.
The comparator with the lowest set point (approximately 0.3 V)
controls the position of the switch within the feedback path of
A1. If the SENSE pin is tied to AVSS (AGND), the switch is
connected to the internal resistor network thus providing a
VREF of 2.0 V. If the SENSE pin is tied to the VREF pin via
a short or resistor, the switch will connect to the SENSE pin.
This short will provide a VREF of 1.0 V. An external resistor
network will provide an alternative VREF between 1.0 V and
2.0 V. The other comparator controls internal circuitry that will
disable the reference amplifier if the SENSE pin is tied AVDD.
Disabling the reference amplifier allows the VREF pin to be
driven by an external voltage reference.
Figure 5. Equivalent Reference Circuit
Full-Scale Input Span = 2 ¥ VREF
DISABLE
A/D
TO
DISABLE
5k
5k
1V
A1
A2
A1
A2
5k
5k
LOGIC
LOGIC
AD9225
6.25k
6.25k
CAPT
CAPB
VREF
SENSE
REFCOM
–10–
The actual reference voltages used by the internal circuitry of
the AD9225 appears on the CAPT and CAPB pins. For proper
operation when using the internal or an external reference, it is
necessary to add a capacitor network to decouple these pins.
Figure 6 shows the recommended decoupling network. This
capacitive network performs the following three functions: (1)
along with the reference amplifier, A2, it provides a low source
impedance over a large frequency range to drive the ADC inter-
nal circuitry, (2) it provides the necessary compensation for A2,
and (3) it bandlimits the noise contribution from the reference.
The turn-on time of the reference voltage appearing between
CAPT and CAPB is approximately 15 ms and should be evalu-
ated in any power-down mode of operation.
The ADC’s input span may be varied dynamically by changing the
differential reference voltage appearing across CAPT and CAPB
symmetrically around 2.5 V (i.e., midsupply). To change the refer-
ence at speeds beyond the capabilities of A2, it will be necessary to
drive CAPT and CAPB with two high speed, low noise amplifiers.
In this case, both internal amplifiers (i.e., A1 and A2) must be
disabled by connecting SENSE to AVDD, connecting VREF to
AVSS and removing the capacitive decoupling network. The exter-
nal voltages applied to CAPT and CAPB must be 2.0 V + Input
Span/4 and 2.0 V – Input Span/4, respectively, in which the input
span can be varied between 2 V and 4 V. Note that those samples
within the pipeline ADC during any reference transition will be
corrupted and should be discarded.
DRIVING THE ANALOG INPUTS
The AD9225 has a highly flexible input structure allowing it to
interface with single ended or differential input interface cir-
cuitry. The applications shown in this section and the Reference
Configurations section along with the information presented in
the Input and Reference Overview give examples of single-
ended and differential operation. Refer to Tables I and II for a
list of the different possible input and reference configurations
and their associated figures in the data sheet.
The optimum mode of operation, analog input range, and asso-
ciated interface circuitry will be determined by the particular
applications performance requirements as well as power supply
options. For example, a dc-coupled single-ended input would
be appropriate for most data acquisition and imaging applica-
tions. Many communication applications, which require a
dc-coupled input for proper demodulation, can take advantage
of the excellent single-ended distortion performance of the
AD9225. The input span should be configured so the system’s
performance objectives and the headroom requirements of the
driving op amp are simultaneously met.
Figure 6. Recommended CAPT/CAPB
Decoupling Network
AD9225
CAPB
CAPT
0.1 F
10 F
0.1 F
0.1 F
Rev. C