MCB1114 Keil, MCB1114 Datasheet - Page 23

• Manufacturer Part Number: MCB1114
• Description: BOARD EVALUATION FOR NXP LPC1114
• Manufacturer: Keil

Specifications of MCB1114

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NXP Semiconductors
LPC1111_12_13_14_0
Objective data sheet
7.12.1 Features
7.14.1 Features
7.13 System tick timer
7.14 Watchdog timer
The ARM Cortex-M0 includes a system tick timer (SYSTICK) that is intended to generate
a dedicated SYSTICK exception at a 10 ms interval.
The purpose of the watchdog is to reset the microcontroller within a reasonable amount of
time if it enters an erroneous state. When enabled, the watchdog will generate a system
reset if the user program fails to ‘feed’ (or reload) the watchdog within a predetermined
amount of time.
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A 32-bit/16-bit timer/counter with a programmable 32-bit/16-bit prescaler.
Counter or timer operation.
One capture channel per timer, that can take a snapshot of the timer value when an
input signal transitions. A capture event may also generate an interrupt.
Four match registers per timer that allow:
– Continuous operation with optional interrupt generation on match.
– Stop timer on match with optional interrupt generation.
– Reset timer on match with optional interrupt generation.
Up to four external outputs corresponding to match registers, with the following
capabilities:
– Set LOW on match.
– Set HIGH on match.
– Toggle on match.
– Do nothing on match.
Internally resets chip if not periodically reloaded.
Debug mode.
Enabled by software but requires a hardware reset or a watchdog reset/interrupt to be
disabled.
Incorrect/Incomplete feed sequence causes reset/interrupt if enabled.
Flag to indicate watchdog reset.
Programmable 32-bit timer with internal prescaler.
Selectable time period from (T
multiples of T
The Watchdog Clock (WDCLK) source can be selected from the Internal RC oscillator
(IRC), the Watchdog oscillator, or the main clock. This gives a wide range of potential
timing choices of Watchdog operation under different power reduction conditions. It
also provides the ability to run the WDT from an entirely internal source that is not
dependent on an external crystal and its associated components and wiring for
increased reliability.
cy(WDCLK)
Rev. 00.11 — 13 November 2009
× 4.
cy(WDCLK)
× 256 × 4) to (T
LPC1111/12/13/14
cy(WDCLK)
× 2
© NXP B.V. 2009. All rights reserved.
32
× 4) in
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