MPC8572EAMC Freescale Semiconductor, MPC8572EAMC Datasheet - Page 43
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MPC8572EAMC
Manufacturer Part Number
MPC8572EAMC
Description
MPC8572 AMC RAPID SYSTEM
Manufacturer
Freescale Semiconductor
Type
MPUr
Datasheet
1.MPC8572EAMC.pdf
(72 pages)
Specifications of MPC8572EAMC
Contents
Board
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
MPC8572E
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Table 5-13
front panel 10/100 Ethernet debug port has physical address 0x02h.
5.3
All clocks used on the MPC8572EAMC are generated locally using crystal oscillators. The only exception
is the PCI-Express clock, which can be generated either locally (using a 100-MHz crystal oscillator), or
externally using the FCLKA input pins (pins 80 and 81 on the AdvancedMC connector). This clock
selection is controlled via the System CPLD logic. A number of different clocking schemes are used on
the MPC8572EAMC, as follows:
5.3.1
The system clock is provided by a 66.66-MHz crystal oscillator. This clock is fed through a 22 Ω series
resistor to produce the required processor system clock, as shown in
Freescale Semiconductor
•
•
•
•
•
MPC8572EAMC System clock, SYSTEM CPLD, DDR Clock (66.66 MHz)
MPC8572E Real Time Clock (16 MHz)
10/100 Ethernet PHY, SGMII Gigabit Ethernet PHY Clock (25 MHz)
Reset CPLD Clock, MMC (ColdFire 5213) Clock (9.8304 MHz)
SERDES Clock (100/125 MHz)
Clocking
shows how the 88E3018 PHY device is configured and physically addressed. Therefore, the
MPC8572EAMC System Clock (SYSCLK)
MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2
Table 5-13. 88E3018 Reset Configuration Settings
Config_0
Config_1
Config_2
Config_3
Figure 5-10. SYSCLK Configuration
0 1 0
0 0 0
0 1 0
0 1 1
Address 0x02h, FEC
Address 0x02h
Enable X-over, PHY AD4 = 0
Copper MII
Figure
MPC8572EAMC Functional Description
5-10.
5-19
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