ADXL210AE Analog Devices Inc, ADXL210AE Datasheet
ADXL210AE
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ADXL210AE Summary of contents
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GENERAL DESCRIPTION The ADXL210E is a low-cost, low-power, complete 2-axis acceler- ometer with a digital output, all on a single monolithic IC improved version of the ADXL210AQC/JQC. The ADXL210E will measure accelerations with a full-scale range ...
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... FILT FILT 10 ± 1000 FILT FILT 3 0.7 V – 200 200 3 0.6 in µF 160 C + 0.3 FILT 125 k , Acceleration = SET ADXL210AE Max Min Typ Max ± 8 ± 10 0.2 ± 1 0.01 ± 2 4.9 3.2 4.0 5 4.4 3.0 3.8 4.6 125 80 100 130 ± 0.5 ...
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... TBD°C/W No. of Model Axes ADXL210JE 2 ADXL210AE* 2 *Available Soon CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADXL210E features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges ...
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ADXL210E–Typical Performance Characteristics 1.42 1.44 1.46 1.48 1.50 1.52 VOLTS 1.40 1.42 1.44 1.46 1.48 1.50 1.52 1.54 1.56 ...
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52.5 53.3 54.2 55.0 55.8 56.7 57.5 58.3 mV 3.5 3.6 3.7 3.8 3.9 4.0 PERCENT DUTY CYCLE PER ...
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ADXL210E 230 250 270 290 310 330 350 NOISE DENSITY – rms 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 –40 – TEMPERATURE – ...
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C ° ° –0.0292 –0.0245 –0.0198 –0.0152 –0.0105 –0.0058 PERCENT/ C ° 2.57 2.55 2.53 2.51 2.49 2.47 2.45 2.43 2.41 ...
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ADXL210E DEFINITIONS T1 Length of the “on” portion of the cycle. T2 Length of the total cycle. Duty Cycle Ratio of the “on” time (T1) of the cycle to the total cycle (T2). Defined as T1/T2 for the ADXL210E/ ADXL210. ...
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DESIGN PROCEDURE FOR THE ADXL210E The design procedure for using the ADXL210E with a duty cycle output involves selecting a duty cycle period and a filter capacitor. A proper design will take into account the application requirements for bandwidth, signal ...
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ADXL210E MICROCOMPUTER INTERFACES The ADXL210E is specifically designed to work with low-cost microcontrollers. Specific code sets, reference designs, and applica- tion notes are available from the factory. This section will outline a general design procedure and discuss the various trade-offs ...
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Table V. Trade-Offs Between Microcontroller Counter Rate, T2 Period, and Resolution of Duty Cycle Modulator Counter- ADXL210E Clock Counts R Sample Rate per T2 SET T2 (ms Rate (MHz) Cycle 1.0 124 1000 2.0 2000 1.0 124 1000 ...
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ADXL210E 0.177 (4.50) SQ OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 8-Terminal Ceramic Leadless Chip Carrier (E-8) 0.050 (1.27) 0.070 (1.78) 0.197 (5.00 0.050 (1.27) TOP VIEW 0.050 (1.27) 5 R0.008 R0.028 (0.70) (0.20) 0.008 BOTTOM VIEW ...