CS8420-CS Cirrus Logic Inc, CS8420-CS Datasheet - Page 60

• Manufacturer Part Number: CS8420-CS
• Description: Transceiver IC
• Manufacturer: Cirrus Logic Inc

Specifications of CS8420-CS

• Audio Control Type: Sample Rate Converter
• Supply Voltage Range: 4.75V To 5.25V
• Operating Temperature Range: -10°C To +70°C
• Audio Ic Case Style: SOIC
• No. Of Pins: 28
• Msl: MSL 2 - 1 Year
• Frequency Max: 108GHz
• Bandwidth: 20kHz
• Rohs Compliant: No
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

14.5 Hardware Mode 4 Description
(Transceive Data Flow, No SRC)
Hardware Mode 4 data flow is shown in Figure 29.
Audio data is input via the AES3 receiver, and rout-
ed to the serial audio output port. Different audio
data synchronous to RMCK may be input into the
serial audio input port, and output via the AES3
transmitter.
The channel status data, user data and validity bit
information are handled in 2 alternative modes: 4A
and 4B, determined by a start-up resistor on the
COPY pin. In mode 4A, the received PRO, COPY,
ORIG, EMPH, and AUDIO channel status bits are
output on pins. The transmitted channel status bits
are copied from the received channel status data,
and the transmitted U and V bits are 0.
In mode 4B, only the COPY and ORIG pins are
output, and reflect the received channel status data.
60
RXP
RXN
Figure 29. Hardware Mode 4 - Transceive Data Flow, without SRC
RMCK
Power supply pins (VD+, VA+, DGND, AGND) & the reset pin (RST) and the PLL filter pin (FILT)
are omitted from this diagram. Please refer to the Typical Connection Diagram for hook-up details.
DFC0
AES3 Rx
&
Decoder
RERR
VD+
DFC1
VD+
H/S
PRO/C
SDOUT
OSCLK
Serial
Audio
Output
COPY ORIG EMPH/U AUDIO/V TCBL
The transmitted channel status bits, user data and
validity bits are input serially via the PRO/C, EM-
PH/U and AUDIO/V pins. Figure 22 shows the
timing requirements.
The APMS pin allows the serial audio input port to
be set to master or slave.
If a validity, parity, bi-phase or lock receiver error
occurs, the current audio sample is passed unmod-
ified to the serial audio output port.
Start-up options are shown in Table 11, and allow
choice of the serial audio output port as a master or
slave, whether TCBL is an input or an output, and
the audio serial ports formats and the source of the
transmitted C, U and V data.
The following pages contain the detailed pin de-
scriptions for hardware mode 4.
OLRCK
C & U bit Data Buffer
ILRCK
ISCLK
Serial
Audio
Input
SDIN
AES3
Encoder
& Tx
APMS
TXP
TXN
CS8420
DS245PP2